mb/emulation/*-riscv: Remove "UCB" from RISC-V board names

RISC-V is not a project of the University of California, Berkeley,
anymore; it stands on its own feet now.

Remove the "UCB" component from the RISC-V mainboards in the "emulation"
directory, and don't set MAINBOARD_VENDOR to UCB, either.

Change-Id: I301d9d0091a714e62375052e5af06a9197876688
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28951
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Jonathan Neuschäfer 2018-10-06 00:04:33 +02:00 committed by Ronald G. Minnich
parent 6bedbd6116
commit 5fba1ea5bc
4 changed files with 8 additions and 16 deletions

View File

@ -15,7 +15,7 @@
# To execute, do:
# qemu-system-arm -M vexpress-a9 -m 1024M -nographic -kernel build/coreboot.rom
if BOARD_EMULATION_QEMU_UCB_RISCV
if BOARD_EMULATION_QEMU_RISCV
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
@ -36,12 +36,8 @@ config MAX_CPUS
int
default 1
config MAINBOARD_VENDOR
string
default "UCB"
config DRAM_SIZE_MB
int
default 32768
endif # BOARD_EMULATION_QEMU_UCB_RISCV
endif # BOARD_EMULATION_QEMU_RISCV

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@ -1,2 +1,2 @@
config BOARD_EMULATION_QEMU_UCB_RISCV
bool "QEMU ucb riscv"
config BOARD_EMULATION_QEMU_RISCV
bool "QEMU riscv"

View File

@ -12,7 +12,7 @@
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
if BOARD_EMULATION_SPIKE_UCB_RISCV
if BOARD_EMULATION_SPIKE_RISCV
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
@ -33,8 +33,4 @@ config MAX_CPUS
int
default 1
config MAINBOARD_VENDOR
string
default "UCB"
endif # BOARD_EMULATION_SPIKE_UCB_RISCV
endif # BOARD_EMULATION_SPIKE_RISCV

View File

@ -1,5 +1,5 @@
config BOARD_EMULATION_SPIKE_UCB_RISCV
bool "SPIKE ucb riscv"
config BOARD_EMULATION_SPIKE_RISCV
bool "SPIKE riscv"
help
To run coreboot in spike:
* run "make" as usual