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sandy/ivybridge: Make UMA size configurable. 

Change-Id: I9aa3652d1b92cece01d024e19bdc065797896001
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6470
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Vladimir Serbinenko 2014-08-03 01:59:38 +02:00
parent 96639fb7db
commit 5fc04d1fdd
12 changed files with 138 additions and 13 deletions
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13
src/mainboard/google/butterfly/cmos.layout
View File

@ -93,7 +93,11 @@ entries
# coreboot config options: bootloader # coreboot config options: bootloader
#Used by ChromeOS: #Used by ChromeOS:
416 128 r 0 vbnv 416 128 r 0 vbnv
#544 440 r 0 unused
# coreboot config options: northbridge
544 3 e 11 gfx_uma_size
#547 437 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -137,6 +141,13 @@ enumerations
7 2 Keep 7 2 Keep
8 0 AHCI 8 0 AHCI
8 1 Compatible 8 1 Compatible
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

13
src/mainboard/google/link/cmos.layout
View File

@ -91,7 +91,11 @@ entries
# coreboot config options: bootloader # coreboot config options: bootloader
#Used by ChromeOS: #Used by ChromeOS:
416 128 r 0 vbnv 416 128 r 0 vbnv
#544 440 r 0 unused
# coreboot config options: northbridge
544 3 e 11 gfx_uma_size
#547 437 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -134,6 +138,13 @@ enumerations
7 2 Keep 7 2 Keep
8 0 AHCI 8 0 AHCI
8 1 Compatible 8 1 Compatible
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

13
src/mainboard/google/parrot/cmos.layout
View File

@ -91,7 +91,11 @@ entries
# coreboot config options: bootloader # coreboot config options: bootloader
#Used by ChromeOS: #Used by ChromeOS:
416 128 r 0 vbnv 416 128 r 0 vbnv
#544 440 r 0 unused
# coreboot config options: northbridge
544 3 e 11 gfx_uma_size
#547 437 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -134,6 +138,13 @@ enumerations
7 2 Keep 7 2 Keep
8 0 AHCI 8 0 AHCI
8 1 Compatible 8 1 Compatible
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

13
src/mainboard/google/stout/cmos.layout
View File

@ -91,7 +91,11 @@ entries
# coreboot config options: bootloader # coreboot config options: bootloader
#Used by ChromeOS: #Used by ChromeOS:
416 128 r 0 vbnv 416 128 r 0 vbnv
#544 440 r 0 unused
# coreboot config options: northbridge
544 3 e 11 gfx_uma_size
#547 437 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -134,6 +138,13 @@ enumerations
7 2 Keep 7 2 Keep
8 0 AHCI 8 0 AHCI
8 1 Compatible 8 1 Compatible
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

14
src/mainboard/intel/emeraldlake2/cmos.layout
View File

@ -91,7 +91,11 @@ entries
# coreboot config options: bootloader # coreboot config options: bootloader
#Used by ChromeOS: #Used by ChromeOS:
416 128 r 0 vbnv 416 128 r 0 vbnv
#544 440 r 0 unused
# coreboot config options: northbridge
544 3 e 11 gfx_uma_size
#547 437 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -134,6 +138,14 @@ enumerations
7 2 Keep 7 2 Keep
8 0 AHCI 8 0 AHCI
8 1 Compatible 8 1 Compatible
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

12
src/mainboard/kontron/ktqm77/cmos.layout
View File

@ -80,7 +80,9 @@ entries
# coreboot config options: cpu # coreboot config options: cpu
400 1 e 2 hyper_threading 400 1 e 2 hyper_threading
#401 7 r 0 unused 401 3 e 12 gfx_uma_size
#404 4 r 0 unused
# coreboot config options: southbridge # coreboot config options: southbridge
408 1 e 1 nmi 408 1 e 1 nmi
@ -165,6 +167,14 @@ enumerations
10 4 LM75@9e 10 4 LM75@9e
11 0 AHCI 11 0 AHCI
11 1 Compatible 11 1 Compatible
12 0 32M
12 1 64M
12 2 96M
12 3 128M
12 4 160M
12 5 192M
12 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

12
src/mainboard/lenovo/t520/cmos.layout
View File

@ -100,8 +100,11 @@ entries
# coreboot config options: cpu # coreboot config options: cpu
424 1 e 2 hyper_threading 424 1 e 2 hyper_threading
#425 7 r 0 unused
#425 559 r 0 unused # coreboot config options: northbridge
432 3 e 11 gfx_uma_size
#435 549 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -150,6 +153,13 @@ enumerations
10 1 Keyboard only 10 1 Keyboard only
10 2 Thinklight only 10 2 Thinklight only
10 3 None 10 3 None
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

12
src/mainboard/lenovo/t530/cmos.layout
View File

@ -100,8 +100,11 @@ entries
# coreboot config options: cpu # coreboot config options: cpu
424 1 e 2 hyper_threading 424 1 e 2 hyper_threading
#425 7 r 0 unused
#425 559 r 0 unused # coreboot config options: northbridge
432 3 e 11 gfx_uma_size
#435 549 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -150,6 +153,13 @@ enumerations
10 1 Keyboard only 10 1 Keyboard only
10 2 Thinklight only 10 2 Thinklight only
10 3 None 10 3 None
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

13
src/mainboard/lenovo/x230/cmos.layout
View File

@ -100,8 +100,11 @@ entries
# coreboot config options: cpu # coreboot config options: cpu
424 1 e 2 hyper_threading 424 1 e 2 hyper_threading
#425 7 r 0 unused
#425 559 r 0 unused # coreboot config options: northbridge
432 3 e 11 gfx_uma_size
#435 549 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -150,6 +153,14 @@ enumerations
10 1 Keyboard only 10 1 Keyboard only
10 2 Thinklight only 10 2 Thinklight only
10 3 None 10 3 None
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

14
src/mainboard/samsung/lumpy/cmos.layout
View File

@ -91,7 +91,11 @@ entries
# coreboot config options: bootloader # coreboot config options: bootloader
#Used by ChromeOS: #Used by ChromeOS:
416 128 r 0 vbnv 416 128 r 0 vbnv
#544 440 r 0 unused
# coreboot config options: northbridge
544 3 e 11 gfx_uma_size
#547 437 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -134,6 +138,14 @@ enumerations
7 2 Keep 7 2 Keep
8 0 AHCI 8 0 AHCI
8 1 Compatible 8 1 Compatible
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

13
src/mainboard/samsung/stumpy/cmos.layout
View File

@ -90,7 +90,11 @@ entries
# coreboot config options: bootloader # coreboot config options: bootloader
#Used by ChromeOS: #Used by ChromeOS:
416 128 r 0 vbnv 416 128 r 0 vbnv
#544 440 r 0 unused
# coreboot config options: northbridge
544 3 e 11 gfx_uma_size
#547 437 r 0 unused
# SandyBridge MRC Scrambler Seed values # SandyBridge MRC Scrambler Seed values
896 32 r 0 mrc_scrambler_seed 896 32 r 0 mrc_scrambler_seed
@ -134,6 +138,13 @@ enumerations
7 2 Keep 7 2 Keep
8 0 AHCI 8 0 AHCI
8 1 Compatible 8 1 Compatible
11 0 32M
11 1 64M
11 2 96M
11 3 128M
11 4 160M
11 5 192M
11 6 224M
# ----------------------------------------------------------------- # -----------------------------------------------------------------
checksums checksums

9
src/northbridge/intel/sandybridge/early_init.c
View File

@ -24,6 +24,7 @@
#include <arch/io.h> #include <arch/io.h>
#include <device/pci_def.h> #include <device/pci_def.h>
#include <elog.h> #include <elog.h>
#include <pc80/mc146818rtc.h>
#include "sandybridge.h" #include "sandybridge.h"
static void sandybridge_setup_bars(void) static void sandybridge_setup_bars(void)
@ -83,6 +84,7 @@ static void sandybridge_setup_graphics(void)
u32 reg32; u32 reg32;
u16 reg16; u16 reg16;
u8 reg8; u8 reg8;
u8 gfxsize;
reg16 = pci_read_config16(PCI_DEV(0,2,0), PCI_DEVICE_ID); reg16 = pci_read_config16(PCI_DEV(0,2,0), PCI_DEVICE_ID);
switch (reg16) { switch (reg16) {
@ -103,10 +105,13 @@ static void sandybridge_setup_graphics(void)
printk(BIOS_DEBUG, "Initializing Graphics...\n"); printk(BIOS_DEBUG, "Initializing Graphics...\n");
/* Setup IGD memory by setting GGC[7:3] = 1 for 32MB */ if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) {
/* Setup IGD memory by setting GGC[7:3] = 1 for 32MB */
gfxsize = 0;
}
reg16 = pci_read_config16(PCI_DEV(0,0,0), GGC); reg16 = pci_read_config16(PCI_DEV(0,0,0), GGC);
reg16 &= ~0x00f8; reg16 &= ~0x00f8;
reg16 |= 1 << 3; reg16 |= (gfxsize + 1) << 3;
/* Program GTT memory by setting GGC[9:8] = 2MB */ /* Program GTT memory by setting GGC[9:8] = 2MB */
reg16 &= ~0x0300; reg16 &= ~0x0300;
reg16 |= 2 << 8; reg16 |= 2 << 8;