GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

intel/skylake: Fix flash_controller.c compilation 

Since this code is not currently being built by coreboot, it
failed compilation.

Change-Id: Ib8a0e1ebc76b7dca3dd785b09398b73abad46366
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12466
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Stefan Reinauer 2015-11-18 15:31:15 -08:00
parent aa5f5b153f
commit 5ff2502151
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/soc/intel/skylake/flash_controller.c
View File

@ -61,18 +61,18 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms,
stopwatch_init_msecs_expire(&sw, timeout_ms);
while (!(timeout = stopwatch_expired(&sw))) {
do {
hsfs = spi_read_hsfs(regs);
if ((hsfs & (HSFS_FDONE | HSFS_FCERR)))
break;
}
} while (!(timeout = stopwatch_expired(&sw)));
if (timeout) {
addr = spi_read_faddr(regs);
hsfc = spi_read_hsfc(regs);
printk(BIOS_ERR, "%ld ms Transaction timeout between offset "
"0x%08x and 0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n",
"0x%08x and 0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n",
stopwatch_duration_msecs(&sw), addr, addr + len - 1,
addr, len - 1, hsfc, hsfs);
return 1;
@ -82,7 +82,7 @@ static int wait_for_completion(pch_spi_regs * const regs, int timeout_ms,
addr = spi_read_faddr(regs);
hsfc = spi_read_hsfc(regs);
printk(BIOS_ERR, "Transaction error between offset 0x%08x and "
"0x%08x (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n",
"0x%08zx (= 0x%08x + %zd) HSFC=%x HSFS=%x!\n",
addr, addr + len - 1, addr, len - 1,
hsfc, hsfs);
return 1;