google/rambi: disable TXE in devicetree for all variants
The TXE PCI device serves no function under Linux, and doesn't work properly under Windows, so disable/hide it from the OS. Test: Boot Windows 10 on google/squawks, verify TXE not visible under Device Manager. Change-Id: Idaa152e15106b826fd5aa787090acd45719f4228 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/30235 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -74,7 +74,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 off end # PCIE_PORT2
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device pci 1c.1 off end # PCIE_PORT2
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@ -75,7 +75,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 on end # I2C6
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device pci 18.6 on end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 off end # PCIE_PORT2
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device pci 1c.1 off end # PCIE_PORT2
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@ -62,7 +62,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 on end # I2C6
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device pci 18.6 on end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 off end # HDA
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device pci 1b.0 off end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -74,7 +74,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -71,7 +71,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 on end # I2C6
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device pci 18.6 on end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -74,7 +74,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -75,7 +75,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -74,7 +74,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -75,7 +75,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 off end # PCIE_PORT2
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device pci 1c.1 off end # PCIE_PORT2
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@ -74,7 +74,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -71,7 +71,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -75,7 +75,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 on end # I2C6
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device pci 18.6 on end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -71,7 +71,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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@ -75,7 +75,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 on end # I2C6
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device pci 18.6 on end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 off end # PCIE_PORT2
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device pci 1c.1 off end # PCIE_PORT2
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@ -74,7 +74,7 @@ chip soc/intel/baytrail
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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device pci 18.5 off end # I2C5
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device pci 18.5 off end # I2C5
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device pci 18.6 off end # I2C6
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device pci 18.6 off end # I2C6
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device pci 18.7 off end # I2C7
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device pci 18.7 off end # I2C7
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device pci 1a.0 on end # TXE
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device pci 1a.0 off end # TXE
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device pci 1b.0 on end # HDA
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device pci 1b.0 on end # HDA
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.0 on end # PCIE_PORT1
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device pci 1c.1 on end # PCIE_PORT2
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device pci 1c.1 on end # PCIE_PORT2
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