nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree

Change-Id: I955274bc6bda587201f130762c0735c36f5501d1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69289
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/asrock/b85m_pro4/devicetree.cb

@@ -4,6 +4,7 @@ chip northbridge/intel/haswell
 	register "gpu_ddi_e_connected" = "1"
 
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
@@ -11,6 +12,7 @@ chip northbridge/intel/haswell
 	end
 
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		subsystemid 0x1849 0x0c00 inherit
 
 		device pci 00.0 on  end		# Host bridge

src/mainboard/asrock/h81m-hds/devicetree.cb

@@ -4,6 +4,7 @@ chip northbridge/intel/haswell
 	register "gpu_ddi_e_connected" = "1"
 
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
@@ -11,6 +12,7 @@ chip northbridge/intel/haswell
 	end
 
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		device pci 00.0 on # Host bridge
 			subsystemid 0x1849 0x0c00
 		end

src/mainboard/google/beltino/devicetree.cb

@@ -14,6 +14,7 @@ chip northbridge/intel/haswell
 	register "usb_xhci_on_resume" = "true"
 
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			# Magic APIC ID to locate this chip
@@ -22,6 +23,7 @@ chip northbridge/intel/haswell
 	end
 
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		subsystemid 0x1ae0 0xc000 inherit
 		device pci 00.0 on end # host bridge
 		device pci 02.0 on end # vga controller

src/mainboard/google/slippy/devicetree.cb

@@ -16,6 +16,7 @@ chip northbridge/intel/haswell
 	register "usb_xhci_on_resume" = "true"
 
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			# Magic APIC ID to locate this chip
@@ -24,6 +25,7 @@ chip northbridge/intel/haswell
 	end
 
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		device pci 00.0 on end # host bridge
 		device pci 02.0 on end # vga controller
 		device pci 03.0 on end # mini-hd audio

src/mainboard/hp/folio_9480m/devicetree.cb

@@ -14,12 +14,14 @@ chip northbridge/intel/haswell
 	}"
 	register "usb_xhci_on_resume" = "true"
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
 		end
 	end
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		subsystemid 0x103c 0x22da inherit
 		device pci 00.0 on end # Host bridge
 		device pci 02.0 on end # Internal graphics VGA controller

src/mainboard/intel/baskingridge/devicetree.cb

@@ -12,6 +12,7 @@ chip northbridge/intel/haswell
 	register "gpu_dp_b_hotplug" = "0x06"
 
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			# Magic APIC ID to locate this chip
@@ -20,6 +21,7 @@ chip northbridge/intel/haswell
 	end
 
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		device pci 00.0 on end # host bridge
 		device pci 02.0 on end # vga controller
 

src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb

@@ -14,12 +14,14 @@ chip northbridge/intel/haswell
 	}"
 	register "ec_present" = "true"
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
 		end
 	end
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		subsystemid 0x17aa 0x220e inherit
 
 		device pci 00.0 on  end	# Host bridge

src/mainboard/lenovo/haswell/variants/w541/devicetree.cb

@@ -14,12 +14,14 @@ chip northbridge/intel/haswell
 	}"
 	register "ec_present" = "true"
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
 		end
 	end
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		subsystemid 0x17aa 0x2211 inherit
 
 		device pci 00.0 on end # Host bridge

src/mainboard/msi/h81m-p33/devicetree.cb

@@ -3,12 +3,14 @@
 chip northbridge/intel/haswell
 	register "gpu_ddi_e_connected" = "1"
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
 		end
 	end
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		subsystemid 0x1462 0x7817 inherit
 		device pci 00.0 on  end		# Host bridge
 		device pci 01.0 on  end		# PEG

src/mainboard/supermicro/x10slm-f/devicetree.cb

@@ -3,6 +3,7 @@
 chip northbridge/intel/haswell
 
 	device cpu_cluster 0 on
+		ops haswell_cpu_bus_ops
 		chip cpu/intel/haswell
 			device lapic 0 on end
 			device lapic 0xacac off end
@@ -10,6 +11,7 @@ chip northbridge/intel/haswell
 	end
 
 	device domain 0 on
+		ops haswell_pci_domain_ops
 		subsystemid 0x15d9 0x0803 inherit
 
 		device pci 00.0 on  end # Host bridge

src/northbridge/intel/haswell/northbridge.c

@@ -34,7 +34,7 @@ static const char *northbridge_acpi_name(const struct device *dev)
 	return NULL;
 }
 
-static struct device_operations pci_domain_ops = {
+struct device_operations haswell_pci_domain_ops = {
 	.read_resources    = pci_domain_read_resources,
 	.set_resources     = pci_domain_set_resources,
 	.scan_bus          = pci_domain_scan_bus,
@@ -557,23 +557,12 @@ static const struct pci_driver mc_driver_hsw __pci_driver = {
 	.devices = mc_pci_device_ids,
 };
 
-static struct device_operations cpu_bus_ops = {
+struct device_operations haswell_cpu_bus_ops = {
 	.read_resources   = noop_read_resources,
 	.set_resources    = noop_set_resources,
 	.init             = mp_cpu_bus_init,
 };
 
-static void enable_dev(struct device *dev)
-{
-	/* Set the operations if it is a special bus type. */
-	if (dev->path.type == DEVICE_PATH_DOMAIN) {
-		dev->ops = &pci_domain_ops;
-	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
-		dev->ops = &cpu_bus_ops;
-	}
-}
-
 struct chip_operations northbridge_intel_haswell_ops = {
 	CHIP_NAME("Intel Haswell integrated Northbridge")
-	.enable_dev = enable_dev,
 };