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drivers/genesyslogic/gl9755: Disable debug mode to enable circuit protections 

In order for short circuit protection and over current protection to work, the
debug mode needs to be turned off.

BUG=b:185749961
TEST=build and test

Signed-off-by: Ben Chuang <benchuanggli@gmail.com>
Change-Id: Iacfa3c668a52d1bae15fe82f1c614d0ebd93a957
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51000
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Ben Chuang 2021-02-05 17:33:38 +08:00 committed by Patrick Georgi
parent 24f7d2e80f
commit 60243501f2
2 changed files with 5 additions and 0 deletions
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3
src/drivers/genesyslogic/gl9755/gl9755.c
View File

@ -28,6 +28,9 @@ static void gl9755_enable(struct device *dev)
reg |= CFG2_LAT_L1_64US; reg |= CFG2_LAT_L1_64US;
pci_write_config32(dev, CFG2, reg); pci_write_config32(dev, CFG2, reg);
/* Turn off debug mode to enable SCP/OCP */
pci_and_config32(dev, CFG3, ~SCP_DEBUG);
/* Set Vendor Config to be non-configurable */ /* Set Vendor Config to be non-configurable */
pci_and_config32(dev, CFG, ~CFG_EN); pci_and_config32(dev, CFG, ~CFG_EN);
} }

2
src/drivers/genesyslogic/gl9755/gl9755.h
View File

@ -15,5 +15,7 @@
#define SNOOP_SCALE (0x3 << 10) #define SNOOP_SCALE (0x3 << 10)
#define NO_SNOOP_VALUE (0x25 << 16) #define NO_SNOOP_VALUE (0x25 << 16)
#define NO_SNOOP_SCALE (0x3 << 26) #define NO_SNOOP_SCALE (0x3 << 26)
#define CFG3 0x70
#define SCP_DEBUG (0x1 << 19)
#endif /* DRIVERS_GENESYSLOGIC_GL9755_H */ #endif /* DRIVERS_GENESYSLOGIC_GL9755_H */