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lib/ramtest.c: Update ram failure post code 

coreboot already has a ram failure post code defined, but the ram test
functions weren't using it, and were using 0xea instead.
This changes those failures to display 0xe3, the value defined in
post_codes.h by POST_RAM_FAILURE.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I21ef196e48ff37ffe320b575d6de66b43997e7eb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Martin Roth 2022-11-03 18:52:51 -06:00 committed by Martin L Roth
parent 9a8667a841
commit 60293e9b1f
1 changed files with 2 additions and 2 deletions
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4
src/lib/ramtest.c
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@ -110,7 +110,7 @@ static int ram_bitset_nodie(uintptr_t start)
} }
} }
if (failures) { if (failures) {
post_code(0xea); post_code(POST_RAM_FAILURE);
printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n");
return 1; return 1;
} }
@ -200,7 +200,7 @@ void quick_ram_check_or_die(uintptr_t dst)
write_phys(dst, backup); write_phys(dst, backup);
if (fail) { if (fail) {
post_code(0xea); post_code(POST_RAM_FAILURE);
die("RAM INIT FAILURE!\n"); die("RAM INIT FAILURE!\n");
} }
phys_memory_barrier(); phys_memory_barrier();