mb/intel/adlrvp: Fix SSD detection issue on ADL RVP

Make PCI ClkReq-to-ClkSrc mapping correct to fix SSD detection issue
on ADL RVP.

TEST=Able to detect WD SSD card over PCH SSD RP9.

Change-Id: I7e26429281f8d3b9edae0f266a5868118369be3f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik 2020-10-14 22:02:48 +05:30
parent bf38d58420
commit 604a104a1c
1 changed files with 2 additions and 2 deletions

View File

@ -43,7 +43,7 @@ chip soc/intel/alderlake
# Enable PCH PCIE RP 5 using CLK 2
register "PcieRpEnable[4]" = "1"
register "PcieClkSrcClkReq[4]" = "4"
register "PcieClkSrcClkReq[2]" = "2"
register "PcieClkSrcUsage[2]" = "0x4"
register "PcieRpClkReqDetect[4]" = "1"
@ -55,7 +55,7 @@ chip soc/intel/alderlake
# Enable PCH PCIE RP 9 using CLK 1
register "PcieRpEnable[8]" = "1"
register "PcieClkSrcClkReq[8]" = "8"
register "PcieClkSrcClkReq[1]" = "1"
register "PcieClkSrcUsage[1]" = "0x8"
register "PcieRpClkReqDetect[8]" = "1"