fix a bug in pcibios check.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5502 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
Stefan Reinauer
parent
79255fcdb3
commit
607cdf62b6
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@ -21,7 +21,7 @@ _start:
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leal _stack, %edi
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movl $_estack, %ecx
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subl %edi, %ecx
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shrl $2, %ecx /* it is 32 bit align, right? */
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shrl $2, %ecx /* it is 32 bit aligned, right? */
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xorl %eax, %eax
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rep
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stosl
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@ -31,7 +31,7 @@ _start:
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movl $_ebss, %ecx
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subl %edi, %ecx
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jz .Lnobss
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shrl $2, %ecx /* it is 32 bit align, right? */
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shrl $2, %ecx /* it is 32 bit aligned, right? */
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xorl %eax, %eax
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rep
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stosl
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@ -72,20 +72,20 @@ _start:
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* Now we are finished. Memory is up, data is copied and
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* bss is cleared. Now we call the main routine and
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* let it do the rest.
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*/
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*/
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post_code(0xfe) /* post fe */
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/* Restore the stack location */
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movl %ebp, %esp
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/* The boot_complete flag has already been pushed */
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call hardwaremain
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/*NOTREACHED*/
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/* NOTREACHED */
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.Lhlt:
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post_code(0xee) /* post ee */
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hlt
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jmp .Lhlt
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vec0:
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pushl $0 /* error code */
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pushl $0 /* vector */
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@ -94,103 +94,104 @@ vec1:
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pushl $0 /* error code */
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pushl $1 /* vector */
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jmp int_hand
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vec2:
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pushl $0 /* error code */
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pushl $2 /* vector */
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jmp int_hand
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vec3:
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pushl $0 /* error code */
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pushl $3 /* vector */
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jmp int_hand
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vec4:
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pushl $0 /* error code */
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pushl $4 /* vector */
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jmp int_hand
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vec5:
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pushl $0 /* error code */
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pushl $5 /* vector */
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jmp int_hand
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vec6:
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pushl $0 /* error code */
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pushl $6 /* vector */
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jmp int_hand
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vec7:
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pushl $0 /* error code */
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pushl $7 /* vector */
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jmp int_hand
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vec8:
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/* error code */
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pushl $8 /* vector */
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jmp int_hand
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.word 0x9090
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vec9:
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pushl $0 /* error code */
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pushl $9 /* vector */
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jmp int_hand
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vec10:
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/* error code */
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pushl $10 /* vector */
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jmp int_hand
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.word 0x9090
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vec11:
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/* error code */
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pushl $11 /* vector */
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jmp int_hand
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.word 0x9090
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vec12:
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/* error code */
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pushl $12 /* vector */
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jmp int_hand
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.word 0x9090
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vec13:
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/* error code */
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pushl $13 /* vector */
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jmp int_hand
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.word 0x9090
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vec14:
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/* error code */
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pushl $14 /* vector */
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jmp int_hand
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.word 0x9090
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vec15:
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pushl $0 /* error code */
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pushl $15 /* vector */
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jmp int_hand
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vec16:
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pushl $0 /* error code */
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pushl $16 /* vector */
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jmp int_hand
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vec17:
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/* error code */
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pushl $17 /* vector */
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jmp int_hand
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.word 0x9090
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vec18:
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pushl $0 /* error code */
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pushl $18 /* vector */
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jmp int_hand
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vec19:
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pushl $0 /* error code */
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pushl $19 /* vector */
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jmp int_hand
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int_hand:
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/* At this point on the stack there is:
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* 0(%esp) vector
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@ -232,7 +233,7 @@ int_hand:
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.globl gdb_stub_breakpoint
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gdb_stub_breakpoint:
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popl %eax /* Return address */
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pushfl
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pushfl
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pushl %cs
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pushl %eax /* Return address */
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pushl $0 /* No error code */
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@ -260,7 +261,7 @@ gdtaddr:
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*
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* When we're executing code from RAM, we want to do more complex
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* stuff, like initializing PCI option roms in real mode, or doing
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* a resume from a suspend to ram.
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* a resume from a suspend to ram.
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*/
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gdt:
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/* selgdt 0, unused */
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@ -271,13 +272,13 @@ gdt:
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.word 0x0000, 0x0000 /* dummy */
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.byte 0x00, 0x00, 0x00, 0x00
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/* selgdt 0x10, flat code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
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/* selgdt 0x10, flat code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
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/* selgdt 0x18, flat data segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x93, 0xcf, 0x00
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.word 0xffff, 0x0000
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.byte 0x00, 0x93, 0xcf, 0x00
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/* selgdt 0x20, unused */
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.word 0x0000, 0x0000 /* dummy */
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@ -285,31 +286,31 @@ gdt:
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/* The next two entries are used for executing VGA option ROMs */
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/* selgdt 0x28 16-bit 64k code at 0x00000000 */
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/* selgdt 0x28 16 bit 64k code at 0x00000000 */
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.word 0xffff, 0x0000
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.byte 0, 0x9a, 0, 0
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/* selgdt 0x30 16-bit 64k data at 0x00000000 */
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/* selgdt 0x30 16 bit 64k data at 0x00000000 */
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.word 0xffff, 0x0000
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.byte 0, 0x92, 0, 0
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/* The next two entries are used for ACPI S3 RESUME */
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/* selgdt 0x38, flat data segment 16bit */
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/* selgdt 0x38, flat data segment 16 bit */
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.word 0x0000, 0x0000 /* dummy */
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.byte 0x00, 0x93, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
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.byte 0x00, 0x93, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
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/* selgdt 0x40, flat code segment 16bit */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
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/* selgdt 0x40, flat code segment 16 bit */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
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gdt_end:
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idtarg:
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.word _idt_end - _idt - 1 /* limit */
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.long _idt
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.word 0
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.word 0
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_idt:
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.fill 20, 8, 0 # idt is unitiailzed
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.fill 20, 8, 0 # idt is uninitialized
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_idt_end:
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.previous
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@ -49,8 +49,8 @@ __realmode_code:
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/* Realmode IDT pointer structure. */
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.globl __realmode_idt
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__realmode_idt = RELOCATED(.)
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.word 1023 /* 16-bit limit */
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.long 0 /* 24-bit base */
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.word 1023 /* 16 bit limit */
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.long 0 /* 24 bit base */
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.word 0
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/* Preserve old stack */
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@ -101,14 +101,14 @@ __run_optionrom = RELOCATED(.)
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1:
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/* Setup a stack: Put the stack at the end of page zero.
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* That way we can easily share it between real and
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* protected, since the 16-bit ESP at segment 0 will
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* protected, since the 16 bit ESP at segment 0 will
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* work for any case. */
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mov $0x0, %ax
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mov %ax, %ss
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movl $0x1000, %eax
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movl %eax, %esp
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/* Load our 16 bit idt */
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/* Load 16 bit IDT */
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xor %ax, %ax
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mov %ax, %ds
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lidt __realmode_idt
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@ -119,9 +119,9 @@ __run_optionrom = RELOCATED(.)
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mov %ax, %gs
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mov $0x40, %ax
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mov %ax, %ds
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mov %cx, %ax // restore ax
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/* ************************************ */
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mov %cx, %ax // restore ax
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// TODO this will not work for non-VGA option ROMs
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/* run VGA BIOS at 0xc000:0003 */
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lcall $0xc000, $0x0003
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@ -201,7 +201,7 @@ __run_vsa = RELOCATED(.)
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1:
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/* Setup a stack: Put the stack at the end of page zero.
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* That way we can easily share it between real and
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* protected, since the 16-bit ESP at segment 0 will
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* protected, since the 16 bit ESP at segment 0 will
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* work for any case. */
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mov $0x0, %ax
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mov %ax, %ss
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@ -415,12 +415,12 @@ __interrupt_handler_16bit = RELOCATED(.)
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mov $0x0, %ax
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mov %ax, %ss
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/* Restore 16-bit IDT */
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/* Restore 16 bit IDT */
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xor %ax, %ax
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mov %ax, %ds
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lidt __realmode_idt
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/* Set up our segment registers to segment 0x0000 */
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/* Set up segment registers to segment 0x0000 */
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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@ -58,6 +58,11 @@ int int12_handler(struct eregs *regs)
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return 0;
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}
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#define PCI_CONFIG_SPACE_TYPE1 (1 << 0)
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#define PCI_CONFIG_SPACE_TYPE2 (1 << 1)
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#define PCI_SPECIAL_CYCLE_TYPE1 (1 << 4)
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#define PCI_SPECIAL_CYCLE_TYPE2 (1 << 5)
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int int1a_handler(struct eregs *regs)
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{
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unsigned short func = (unsigned short)regs->eax;
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@ -74,6 +79,11 @@ int int1a_handler(struct eregs *regs)
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switch (func) {
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case PCIBIOS_CHECK:
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regs->edx = 0x20494350; /* ' ICP' */
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regs->eax &= 0xffff0000; /* Clear AH / AL */
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regs->eax |= PCI_CONFIG_SPACE_TYPE1 | PCI_SPECIAL_CYCLE_TYPE1;
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// last bus in the system. Hard code to 255 for now.
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// dev_enumerate() does not seem to tell us (publically)
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regs->ecx = 0xff;
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regs->edi = 0x00000000; /* protected mode entry */
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retval = 0;
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break;
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@ -114,7 +124,7 @@ int int1a_handler(struct eregs *regs)
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dev = dev_find_slot(bus, devfn);
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if (!dev) {
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printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
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// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
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// Or are we supposed to return PCIBIOS_NODEV?
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regs->eax = PCIBIOS_BADREG;
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retval = -1;
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return retval;
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@ -164,38 +174,12 @@ int int15_handler(struct eregs *regs)
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{
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int res = -1;
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/* This int15 handler is VIA Tech. specific. Other chipsets need other
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/* This int15 handler is Intel IGD. specific. Other chipsets need other
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* handlers. The right way to do this is to move this handler code into
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* the mainboard or northbridge code.
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* TODO: completely move to mainboards / chipsets.
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*/
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switch (regs->eax & 0xffff) {
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case 0x5f19:
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break;
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case 0x5f18:
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regs->eax = 0x5f;
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// MCLK = 133, 32M frame buffer, 256 M main memory
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regs->ebx = 0x545;
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regs->ecx = 0x060;
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res = 0;
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break;
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case 0x5f00:
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regs->eax = 0x8600;
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break;
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case 0x5f01:
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regs->eax = 0x5f;
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regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
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res = 0;
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break;
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case 0x5f02:
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regs->eax = 0x5f;
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regs->ebx = (regs->ebx & 0xffff0000) | 2;
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regs->ecx = (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
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regs->edx = (regs->edx & 0xffff0000) | 0; // TV Layout - default
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res = 0;
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break;
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case 0x5f0f:
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regs->eax = 0x860f;
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break;
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/* And now Intel IGD code */
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#define BOOT_DISPLAY_DEFAULT 0
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#define BOOT_DISPLAY_CRT (1 << 0)
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@ -206,7 +190,6 @@ int int15_handler(struct eregs *regs)
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#define BOOT_DISPLAY_TV2 (1 << 5)
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#define BOOT_DISPLAY_EFP2 (1 << 6)
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#define BOOT_DISPLAY_LCD2 (1 << 7)
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case 0x5f35:
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regs->eax = 0x5f;
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regs->ecx = BOOT_DISPLAY_DEFAULT;
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