ivy: Add a possiblity for mainboard early init.

This is needed for stout EC init.

Change-Id: I5c73499c17763229840152a473a2d820802ee2f6
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13535
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/mainboard/apple/macbookair4_2/early_southbridge.c

@@ -52,6 +52,9 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
 	{ 1, 0, -1 },
 };
 
+void mainboard_early_init(int s3resume) {
+}
+
 void mainboard_get_spd(spd_raw_data *spd)
 {
 	void *spd_file;

src/mainboard/gigabyte/ga-b75m-d3h/romstage.c

@@ -205,3 +205,6 @@ static void dmi_config(void)
 	DMIBAR32(0x0e2c) = 0x20000000;
 }
 #endif
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/gigabyte/ga-b75m-d3v/romstage.c

@@ -115,3 +115,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
         read_spd (&spd[2], 0x52);
         read_spd (&spd[3], 0x53);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/google/butterfly/romstage.c

@@ -128,3 +128,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
 	read_spd(&spd[0], 0x50);
 	read_spd(&spd[2], 0x52);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/lenovo/t420s/romstage.c

@@ -67,3 +67,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
 	read_spd(&spd[0], 0x50);
 	read_spd(&spd[2], 0x51);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/lenovo/t430s/romstage.c

@@ -67,3 +67,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
 	read_spd(&spd[0], 0x50);
 	read_spd(&spd[2], 0x51);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/lenovo/t520/romstage.c

@@ -82,3 +82,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
 	read_spd (&spd[0], 0x50);
 	read_spd (&spd[2], 0x51);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/lenovo/t530/romstage.c

@@ -69,3 +69,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
 	read_spd (&spd[0], 0x50);
 	read_spd (&spd[2], 0x51);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/lenovo/x220/romstage.c

@@ -79,3 +79,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
 	read_spd (&spd[0], 0x50);
 	read_spd (&spd[2], 0x51);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/mainboard/lenovo/x230/romstage.c

@@ -82,3 +82,6 @@ void mainboard_get_spd(spd_raw_data *spd) {
 	read_spd (&spd[0], 0x50);
 	read_spd (&spd[2], 0x51);
 }
+
+void mainboard_early_init(int s3resume) {
+}

src/northbridge/intel/sandybridge/raminit_native.h

@@ -24,5 +24,6 @@ void read_spd(spd_raw_data *spd, u8 addr);
 void mainboard_get_spd(spd_raw_data *spd);
 void rcba_config(void);
 void pch_enable_lpc(void);
+void mainboard_early_init(int s3resume);
 
 #endif				/* RAMINIT_H */

src/northbridge/intel/sandybridge/romstage.c

@@ -103,6 +103,9 @@ void main(unsigned long bist)
 	s3resume = southbridge_detect_s3_resume();
 
 	post_code(0x38);
+
+	mainboard_early_init(s3resume);
+
 	/* Enable SPD ROMs and DDR-III DRAM */
 	enable_smbus();
 

util/autoport/bd82x6x.go

@@ -358,6 +358,10 @@ void rcba_config(void)
 	guessedMap := GuessSPDMap(ctx)
 
 	sb.WriteString(`
+void mainboard_early_init(int s3resume)
+{
+}
+
 /* FIXME: Put proper SPD map here. */
 void mainboard_get_spd(spd_raw_data *spd)
 {