soc/amd/common/block/cpu/Kconfig: drop FAM17H_19H suffix from TSC option

The SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H option is valid for all SoCs
with Zen-based CPU cores including the family 1Ah, so remove the suffix.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I58d29e69a44b7b97fa5cfeb0e461531b926f7480
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
This commit is contained in:
Felix Held 2023-03-24 20:33:15 +01:00
parent 56f1221f2f
commit 60df7ca07b
7 changed files with 10 additions and 10 deletions

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@ -65,7 +65,7 @@ config SOC_AMD_CEZANNE
select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
select SOC_AMD_COMMON_BLOCK_SPI select SOC_AMD_COMMON_BLOCK_SPI
select SOC_AMD_COMMON_BLOCK_SVI2 select SOC_AMD_COMMON_BLOCK_SVI2
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H select SOC_AMD_COMMON_BLOCK_TSC
select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_UCODE select SOC_AMD_COMMON_BLOCK_UCODE
select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB

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@ -96,15 +96,15 @@ config SOC_AMD_COMMON_BLOCK_SVI3
Select this option is the SoC uses the serial VID 3 standard for Select this option is the SoC uses the serial VID 3 standard for
encoding the voltage it requests from the VRM. encoding the voltage it requests from the VRM.
config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H config SOC_AMD_COMMON_BLOCK_TSC
bool bool
select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function
select TSC_SYNC_LFENCE select TSC_SYNC_LFENCE
select UDELAY_TSC select UDELAY_TSC
help help
Select this option to add the common functions for getting the TSC Select this option to add the common functions for getting the TSC
frequency of AMD family 17h and 19h CPUs/APUs and to provide TSC- frequency of AMD family 17h, 19h and 1Ah CPUs/APUs and to provide
based monotonic timer functionality to the build. TSC-based monotonic timer functionality to the build.
config SOC_AMD_COMMON_BLOCK_UCODE config SOC_AMD_COMMON_BLOCK_UCODE
bool bool

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@ -20,7 +20,7 @@ smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H) += cpufreq_15_16.c
smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c
smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H),y) ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_TSC),y)
bootblock-y += tsc_freq.c bootblock-y += tsc_freq.c
bootblock-y += monotonic_timer.c bootblock-y += monotonic_timer.c
@ -37,4 +37,4 @@ ramstage-y += monotonic_timer.c
smm-y += tsc_freq.c smm-y += tsc_freq.c
smm-y += monotonic_timer.c smm-y += monotonic_timer.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H endif # CONFIG_SOC_AMD_COMMON_BLOCK_TSC

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@ -71,7 +71,7 @@ config SOC_AMD_GLINDA
select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_SPI # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_SPI # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_SVI3 select SOC_AMD_COMMON_BLOCK_SVI3
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H select SOC_AMD_COMMON_BLOCK_TSC
select SOC_AMD_COMMON_BLOCK_UART # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_UART # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_UCODE # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_UCODE # TODO: Check if this is still correct
select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB # TODO: Check if this is still correct select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB # TODO: Check if this is still correct

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@ -73,7 +73,7 @@ config SOC_AMD_REMBRANDT_BASE
select SOC_AMD_COMMON_BLOCK_SPI select SOC_AMD_COMMON_BLOCK_SPI
select SOC_AMD_COMMON_BLOCK_STB select SOC_AMD_COMMON_BLOCK_STB
select SOC_AMD_COMMON_BLOCK_SVI3 select SOC_AMD_COMMON_BLOCK_SVI3
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H select SOC_AMD_COMMON_BLOCK_TSC
select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_UCODE select SOC_AMD_COMMON_BLOCK_UCODE
select SOC_AMD_COMMON_BLOCK_XHCI select SOC_AMD_COMMON_BLOCK_XHCI

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@ -71,7 +71,7 @@ config SOC_AMD_PHOENIX
select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
select SOC_AMD_COMMON_BLOCK_SPI select SOC_AMD_COMMON_BLOCK_SPI
select SOC_AMD_COMMON_BLOCK_SVI3 select SOC_AMD_COMMON_BLOCK_SVI3
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H select SOC_AMD_COMMON_BLOCK_TSC
select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_UCODE select SOC_AMD_COMMON_BLOCK_UCODE
select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB # TODO: Check if this is still correct select SOC_AMD_COMMON_FSP_CCX_CPPC_HOB # TODO: Check if this is still correct

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@ -61,7 +61,7 @@ config SOC_AMD_PICASSO
select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
select SOC_AMD_COMMON_BLOCK_SPI select SOC_AMD_COMMON_BLOCK_SPI
select SOC_AMD_COMMON_BLOCK_SVI2 select SOC_AMD_COMMON_BLOCK_SVI2
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H select SOC_AMD_COMMON_BLOCK_TSC
select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UART
select SOC_AMD_COMMON_BLOCK_UCODE select SOC_AMD_COMMON_BLOCK_UCODE
select SOC_AMD_COMMON_FSP_DMI_TABLES select SOC_AMD_COMMON_FSP_DMI_TABLES