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imgtech/pistacho: Add vboot2 memory region 

Change-Id: I375397d4a1db6fef6b40421590f315c0f7eb0948
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/11100
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi 2015-07-31 17:27:23 +02:00
parent 6f0e8bdc16
commit 61234909f8
1 changed files with 3 additions and 1 deletions
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4
src/soc/imgtec/pistachio/include/soc/memlayout.ld
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@ -18,6 +18,7 @@
*/ */
#include <memlayout.h> #include <memlayout.h>
#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld> #include <arch/header.ld>
@ -39,7 +40,8 @@ SECTIONS
*/ */
SRAM_START(0x1a000000) SRAM_START(0x1a000000)
ROMSTAGE(0x1a005000, 40K) ROMSTAGE(0x1a005000, 40K)
PRERAM_CBFS_CACHE(0x1a00f000, 68K) VBOOT2_WORK(0x1a00f000, 12K)
PRERAM_CBFS_CACHE(0x1a012000, 56K)
SRAM_END(0x1a020000) SRAM_END(0x1a020000)
/* Bootblock executes out of KSEG0 and sets up the identity mapping. /* Bootblock executes out of KSEG0 and sets up the identity mapping.