drivers/i2c/designware/dw_i2c: improve CONTROL_SPEED_FS definition

The speed control bits of the Designware I2C controller are bits 1 and 2
in the control register, so the values should be written as number
shifted by the number of the first bit. The resulting constant is
identical.

TEST=Timeless build for amd/chausie results in identical binary

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id0881dfcd7703ab6a70a9b1a355d5a93771aebc6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/drivers/i2c/designware/dw_i2c.c

@@ -43,7 +43,7 @@ struct freq {
 enum {
 	CONTROL_MASTER_MODE		= (1 << 0),
 	CONTROL_SPEED_SS		= (1 << 1),
-	CONTROL_SPEED_FS		= (1 << 2),
+	CONTROL_SPEED_FS		= (2 << 1),
 	CONTROL_SPEED_HS		= (3 << 1),
 	CONTROL_SPEED_MASK		= (3 << 1),
 	CONTROL_10BIT_SLAVE		= (1 << 3),