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soc/intel/broadwell: Do early ME init a bit earlier 

Do early ME init before adding the "start of raminit" timestamp.

Change-Id: If8b27a9d4eb3b801e3e05dc2f2b95bf748985707
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55800
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2021-06-23 13:02:22 +02:00 committed by Felix Held
parent d0bf247506
commit 61615e95e2
1 changed files with 7 additions and 7 deletions
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14
src/soc/intel/broadwell/romstage.c
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@ -54,6 +54,13 @@ void mainboard_romstage_entry(void)
/* Initialize GPIOs */ /* Initialize GPIOs */
setup_pch_lp_gpios(mainboard_lp_gpio_map); setup_pch_lp_gpios(mainboard_lp_gpio_map);
/* Print ME state before MRC */
intel_me_status();
/* Save ME HSIO version */
intel_me_hsio_version(&power_state->hsio_version,
&power_state->hsio_checksum);
mainboard_fill_pei_data(&pei_data); mainboard_fill_pei_data(&pei_data);
mainboard_fill_spd_data(&pei_data); mainboard_fill_spd_data(&pei_data);
@ -63,13 +70,6 @@ void mainboard_romstage_entry(void)
pei_data.boot_mode = power_state->prev_sleep_state; pei_data.boot_mode = power_state->prev_sleep_state;
/* Print ME state before MRC */
intel_me_status();
/* Save ME HSIO version */
intel_me_hsio_version(&power_state->hsio_version,
&power_state->hsio_checksum);
/* Initialize RAM */ /* Initialize RAM */
sdram_initialize(&pei_data); sdram_initialize(&pei_data);