diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c
index a3150093b1..24d5937ce7 100644
--- a/src/superio/ite/common/early_serial.c
+++ b/src/superio/ite/common/early_serial.c
@@ -36,7 +36,7 @@ static void ite_sio_write(pnp_devfn_t dev, u8 reg, u8 value)
 }
 
 /* Enable configuration */
-static void pnp_enter_conf_state(pnp_devfn_t dev)
+void pnp_enter_conf_state(pnp_devfn_t dev)
 {
 	u16 port = dev >> 8;
 
@@ -47,7 +47,7 @@ static void pnp_enter_conf_state(pnp_devfn_t dev)
 }
 
 /* Disable configuration */
-static void pnp_exit_conf_state(pnp_devfn_t dev)
+void pnp_exit_conf_state(pnp_devfn_t dev)
 {
 	ite_sio_write(dev, ITE_CONFIG_REG_CC, 0x02);
 }
diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h
index 02700a61e2..7e0e80ec96 100644
--- a/src/superio/ite/common/ite.h
+++ b/src/superio/ite/common/ite.h
@@ -31,4 +31,7 @@ void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value);
 void ite_enable_3vsbsw(pnp_devfn_t dev);
 void ite_kill_watchdog(pnp_devfn_t dev);
 
+void pnp_enter_conf_state(pnp_devfn_t dev);
+void pnp_exit_conf_state(pnp_devfn_t dev);
+
 #endif /* SUPERIO_ITE_COMMON_ROMSTAGE_H */