soc/intel/apollolake: group serial console options into one Kconfig
Add SOC_UART_DEBUG which does all the appropriate selection of the dependent Kconfig options for seral console. Also provide a default option of it being turned off instead of always selected. Change-Id: I1a6dba9c0072a17859c8f389709afe6fe3b04fac Signed-off-by: Aaron Durbin <adurbin@chormium.org> Reviewed-on: https://review.coreboot.org/13790 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
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@ -32,13 +32,9 @@ config CPU_SPECIFIC_OPTIONS
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select RELOCATABLE_RAMSTAGE # Build fails if this is not selected
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select SOC_INTEL_COMMON
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select UDELAY_TSC
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select CONSOLE_SERIAL
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select BOOTBLOCK_CONSOLE
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select TSC_CONSTANT_RATE
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select UDELAY_TSC
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select TSC_CONSTANT_RATE
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select NO_UART_ON_SUPERIO
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select DRIVERS_UART_8250MEM_32
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config MMCONF_BASE_ADDRESS
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hex "PCI MMIO Base Address"
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@ -75,6 +71,15 @@ config CONSOLE_UART_BASE_ADDRESS
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hex "MMIO base address for UART"
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default 0xde000000
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config SOC_UART_DEBUG
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bool "Enable SoC UART debug port selected by UART_FOR_CONSOLE."
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default n
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select CONSOLE_SERIAL
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select BOOTBLOCK_CONSOLE
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select DRIVERS_UART
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select DRIVERS_UART_8250MEM_32
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select NO_UART_ON_SUPERIO
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# 32KiB bootblock is all that is mapped in by the CSE at top of 4GiB.
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config C_ENV_BOOTBLOCK_SIZE
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hex
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@ -13,16 +13,16 @@ bootblock-y += bootblock/bootblock.c
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bootblock-y += gpio.c
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bootblock-y += placeholders.c
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bootblock-y += tsc_freq.c
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bootblock-y += uart_early.c
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bootblock-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
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romstage-y += placeholders.c
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romstage-y += gpio.c
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romstage-y += uart_early.c
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romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
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smm-y += placeholders.c
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ramstage-y += placeholders.c
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ramstage-y += gpio.c
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ramstage-y += uart_early.c
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ramstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
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CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include
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