soc/amd/picasso/acpi: Add missing UART resources

Both UART and DMA MMIO regions for each UART are mapped by the
UEFI reference code, so do the same here.

Without these defined, UART-attached devices fail to correctly
initialize under Windows.

Change-Id: I0e1af9028c7c1746407e923cebe824a15aeb565e
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65233
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2022-06-18 15:32:39 -05:00 committed by Felix Held
parent 7b4643f5fa
commit 619bb07494
1 changed files with 8 additions and 0 deletions

View File

@ -107,6 +107,7 @@ Device (FUR0)
Exclusive, , , IRQR) Exclusive, , , IRQR)
{ 0 } { 0 }
Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000)
} }
CreateDWordField (Local0, IRQR._INT, IRQN) CreateDWordField (Local0, IRQR._INT, IRQN)
If (PICM) { If (PICM) {
@ -117,6 +118,7 @@ Device (FUR0)
If (IRQN == 0x1f) { If (IRQN == 0x1f) {
Return (ResourceTemplate() { Return (ResourceTemplate() {
Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000)
}) })
} Else { } Else {
Return (Local0) Return (Local0)
@ -138,6 +140,7 @@ Device (FUR1) {
Exclusive, , , IRQR) Exclusive, , , IRQR)
{ 0 } { 0 }
Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000)
} }
CreateDWordField (Local0, IRQR._INT, IRQN) CreateDWordField (Local0, IRQR._INT, IRQN)
If (PICM) { If (PICM) {
@ -148,6 +151,7 @@ Device (FUR1) {
If (IRQN == 0x1f) { If (IRQN == 0x1f) {
Return (ResourceTemplate() { Return (ResourceTemplate() {
Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000)
}) })
} Else { } Else {
Return (Local0) Return (Local0)
@ -169,6 +173,7 @@ Device (FUR2) {
Exclusive, , , IRQR) Exclusive, , , IRQR)
{ 0 } { 0 }
Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000)
} }
CreateDWordField (Local0, IRQR._INT, IRQN) CreateDWordField (Local0, IRQR._INT, IRQN)
If (PICM) { If (PICM) {
@ -179,6 +184,7 @@ Device (FUR2) {
If (IRQN == 0x1f) { If (IRQN == 0x1f) {
Return (ResourceTemplate() { Return (ResourceTemplate() {
Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000)
}) })
} Else { } Else {
Return (Local0) Return (Local0)
@ -200,6 +206,7 @@ Device (FUR3) {
Exclusive, , , IRQR) Exclusive, , , IRQR)
{ 0 } { 0 }
Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000)
} }
CreateDWordField (Local0, IRQR._INT, IRQN) CreateDWordField (Local0, IRQR._INT, IRQN)
If (PICM) { If (PICM) {
@ -210,6 +217,7 @@ Device (FUR3) {
If (IRQN == 0x1f) { If (IRQN == 0x1f) {
Return (ResourceTemplate() { Return (ResourceTemplate() {
Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000)
Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000)
}) })
} Else { } Else {
Return (Local0) Return (Local0)