mb/amd/gardenia/devicetree: disable unused gpp_bridge_2

The board's PCIe port descriptors have the PCIe engine disabled, so
update the devicetree accordingly.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic97a54c3cc762a36752d6b9f21467428912a9edd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68379
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2022-10-12 23:46:53 +02:00
parent 4c1a389828
commit 61b50a64bf
1 changed files with 0 additions and 1 deletions

View File

@ -14,7 +14,6 @@ chip soc/amd/stoneyridge
device ref gfx_hda on end device ref gfx_hda on end
device ref gpp_bridge_0 on end # x4 PCIe slot device ref gpp_bridge_0 on end # x4 PCIe slot
device ref gpp_bridge_1 on end # M.2 slot device ref gpp_bridge_1 on end # M.2 slot
device ref gpp_bridge_2 on end # M.2 slot
device ref gpp_bridge_3 on end # x1 PCIe slot device ref gpp_bridge_3 on end # x1 PCIe slot
device ref gpp_bridge_4 on end # Cardreader device ref gpp_bridge_4 on end # Cardreader
device ref hda_bridge on end device ref hda_bridge on end