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ibexpeak: Set number of USB ports. 

Change-Id: Ife3febcc88967386dfae624cd237562a34a68471
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5956
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Vladimir Serbinenko 2014-06-07 16:41:14 +02:00
parent 49c3045c2d
commit 61f902d4a7
1 changed files with 17 additions and 0 deletions
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17
src/southbridge/intel/ibexpeak/usb_ehci.c
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@ -30,6 +30,8 @@
static void usb_ehci_init(struct device *dev) static void usb_ehci_init(struct device *dev)
{ {
u32 reg32; u32 reg32;
struct resource *res;
u8 access_cntl;
/* Disable Wake on Disconnect in RMH */ /* Disable Wake on Disconnect in RMH */
reg32 = RCBA32(0x35b0); reg32 = RCBA32(0x35b0);
@ -50,6 +52,21 @@ static void usb_ehci_init(struct device *dev)
//reg32 |= PCI_COMMAND_SERR; //reg32 |= PCI_COMMAND_SERR;
pci_write_config32(dev, PCI_COMMAND, reg32); pci_write_config32(dev, PCI_COMMAND, reg32);
access_cntl = pci_read_config8(dev, 0x80);
/* Enable writes to protected registers. */
pci_write_config8(dev, 0x80, access_cntl | 1);
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
/* Number of ports and companion controllers. */
reg32 = read32(res->base + 4);
write32(res->base + 4, (reg32 & 0xfff00000) | 2);
}
/* Restore protection. */
pci_write_config8(dev, 0x80, access_cntl);
printk(BIOS_DEBUG, "done.\n"); printk(BIOS_DEBUG, "done.\n");
} }