cpu/intel/common/fsb.c: Drop CAR_GLOBAL_MIGRATION support
Change-Id: I151090c8d7f670f121dc7e4cbebfd720034fde33 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37051 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -11,7 +11,6 @@
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* GNU General Public License for more details.
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*/
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#include <arch/early_variables.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/tsc.h>
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#include <cpu/intel/speedstep.h>
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@ -20,8 +19,8 @@
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#include <commonlib/helpers.h>
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#include <delay.h>
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static u32 g_timer_fsb CAR_GLOBAL;
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static u32 g_timer_tsc CAR_GLOBAL;
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static u32 g_timer_fsb;
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static u32 g_timer_tsc;
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/* This is not an architectural MSR. */
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#define MSR_PLATFORM_INFO 0xce
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@ -99,8 +98,8 @@ static void resolve_timebase(void)
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ret = get_fsb_tsc(&fsb, &ratio);
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if (ret == 0) {
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u32 tsc = 100 * DIV_ROUND_CLOSEST(ratio * fsb, 100);
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car_set_var(g_timer_fsb, fsb);
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car_set_var(g_timer_tsc, tsc);
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g_timer_fsb = fsb;
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g_timer_tsc = tsc;
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return;
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}
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@ -110,33 +109,27 @@ static void resolve_timebase(void)
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printk(BIOS_ERR, "CPU not supported\n");
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/* Set some semi-ridiculous defaults. */
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car_set_var(g_timer_fsb, 500);
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car_set_var(g_timer_tsc, 5000);
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g_timer_fsb = 500;
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g_timer_tsc = 5000;
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return;
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}
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u32 get_timer_fsb(void)
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{
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u32 fsb;
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fsb = car_get_var(g_timer_fsb);
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if (fsb > 0)
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return fsb;
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if (g_timer_fsb > 0)
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return g_timer_fsb;
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resolve_timebase();
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return car_get_var(g_timer_fsb);
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return g_timer_fsb;
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}
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unsigned long tsc_freq_mhz(void)
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{
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u32 tsc;
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tsc = car_get_var(g_timer_tsc);
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if (tsc > 0)
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return tsc;
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if (g_timer_tsc > 0)
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return g_timer_tsc;
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resolve_timebase();
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return car_get_var(g_timer_tsc);
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return g_timer_tsc;
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}
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/**
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