soc/amd/picasso: Update all PSP and amdfw.rom building
Add Kconfig options and Makefile command line options to generate the amdfw.rom image. A new intermediate image is introduced, which is the initial BIOS image the PSP places into DRAM prior to releasing the x86 reset. The amd_biospsp.img is a compressed version of the romstage.elf program pieces. Additional details of the PSP items are not public information. See NDA document PID #55758. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: Ib5e393e74ed60e968959012b6275686167a2d78a Reviewed-on: https://review.coreboot.org/c/coreboot/+/33764 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson
Martin Roth
parent
2329a2537d
commit
6261141579
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@ -1,7 +1,7 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2017 Advanced Micro Devices, Inc.
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## Copyright (C) 2019 Advanced Micro Devices, Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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@ -134,7 +134,7 @@ config EHCI_BAR
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config AMD_PUBKEY_FILE
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string "AMD public Key"
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default "3rdparty/blobs/soc/amd/picasso/PSP/AmdPubKeyST.bin"
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default "3rdparty/blobs/soc/amd/picasso/PSP/AmdPubKeyRV.bin"
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config PICASSO_SATA_MODE
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int "SATA Mode"
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@ -242,14 +242,24 @@ config ACPI_BERT
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ACPI Boot Error Record Table. This option reserves an 8MB region
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for building the error structures.
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config USE_PSPSECUREOS
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bool "Include PSP SecureOS blobs in AMD firmware"
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default y
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help
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Include the PspSecureOs, PspTrustlet and TrustletKey binaries
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in the amdfw section.
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config RO_REGION_ONLY
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string
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depends on CHROMEOS
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default "apu/amdfw"
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If unsure, answer 'y'
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config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
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int
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default 133
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config MAINBOARD_POWER_RESTORE
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def_bool n
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help
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This option determines what state to go to once power is restored
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after having been lost in S0. Select this option to automatically
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return to S0. Otherwise the system will remain in S5 once power
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is restored.
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menu "PSP Configuration Options"
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config AMDFW_OUTSIDE_CBFS
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bool "The AMD firmware is outside CBFS"
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@ -292,21 +302,76 @@ comment "AMD Firmware Directory Table set to location for 8MB ROM"
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comment "AMD Firmware Directory Table set to location for 16MB ROM"
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depends on AMD_FWM_POSITION_INDEX = 5
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config RO_REGION_ONLY
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string
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depends on CHROMEOS
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default "apu/amdfw"
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config AMD_PUBKEY_FILE
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string "AMD public Key"
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default "3rdparty/blobs/soc/amd/picasso/PSP/AmdPubKeyRV.bin"
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config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ
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int
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default 133
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config MAINBOARD_POWER_RESTORE
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def_bool n
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config PSP_APCB_FILE
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string "APCB file"
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help
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This option determines what state to go to once power is restored
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after having been lost in S0. Select this option to automatically
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return to S0. Otherwise the system will remain in S5 once power
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is restored.
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The name of the AGESA Parameter Customization Block.
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config PSP_APOB_DESTINATION
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hex
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default 0x9f00000
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help
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Location in DRAM where the PSP will copy the AGESA PSP Output
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Block.
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config PSP_APOB_NV_ADDRESS
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hex "Base address of APOB NV"
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default 0xffa68000
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help
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Location in flash where the PSP can find the S3 restore information.
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Place this on a boundary that the flash device can erase.
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TODO: The above default value is arbitrary, but eventually coreboot's
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MRC cache base address should be used.
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config PSP_APOB_NV_SIZE
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hex "Size of APOB NV to be reserved"
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default 0x10000
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help
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Size of the S3 restore information. Make this a multiple of the
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size the flash device can erase.
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TODO: The above default value is arbitrary, but eventually coreboot's
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MRC cache size should be used.
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config USE_PSPSCUREOS
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bool "Include PSP SecureOS blobs in PSP build"
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default y
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help
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Include the PspSecureOs and PspTrustlet binaries in the PSP build.
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If unsure, answer 'y'
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config PSP_LOAD_MP2_FW
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bool "Include MP2 blobs in PSP build"
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default y
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help
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Include the MP2 firmwares and configuration into the PSP build.
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If unsure, answer 'y'
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config PSP_LOAD_S0I3_FW
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bool "Include S0I3 blob in PSP build"
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help
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Select this item to include the S0i3 file into the PSP build.
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config HAVE_PSP_WHITELIST_FILE
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bool "Include a debug whitelist file in PSP build"
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default n
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help
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Support secured unlock prior to reset using a whitelisted
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number? This feature requires a signed whitelist image and
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bootloader from AMD.
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If unsure, answer 'n'
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config PSP_WHITELIST_FILE
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string "Debug whitelist file name"
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depends on HAVE_PSP_WHITELIST_FILE
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default "3rdparty/blobs/soc/amd/picasso/PSP/wtl-rvn.sbin"
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endmenu
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endif # SOC_AMD_PICASSO
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@ -1,6 +1,6 @@
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#*****************************************************************************
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#
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# Copyright (c) 2012, 2016-2017 Advanced Micro Devices, Inc.
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# Copyright (c) 2012, 2016-2019 Advanced Micro Devices, Inc.
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# 2013 - 2014 Sage Electronic Engineering, LLC
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# All rights reserved.
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#
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@ -96,126 +96,291 @@ CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
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# ROMSIG Normally At ROMBASE + 0x20000
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# Overridden by CONFIG_AMD_FWM_POSITION_INDEX
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# +-----------+---------------+----------------+------------+
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# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM |
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# |0x55AA55AA | | | |
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# +-----------+---------------+----------------+------------+
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# |PSPDIR ADDR|
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# +-----------+
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#
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# EC ROM should be 64K aligned.
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# | | PSPDIR ADDR | BIOSDIR ADDR |
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# +-----------+---------------+----------------+
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PICASSO_FWM_POSITION=$(call int-add, \
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$(call int-subtract, 0xffffffff \
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$(call int-shift-left, \
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0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
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### 0
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#
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# PSP Directory Table items
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#
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# Certain ordering requirements apply, however these are ensured by amdfwtool.
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# For more information see "AMD Platform Security Processor BIOS Architecture
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# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
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#
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# type = 0x0
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FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
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FIRMWARE_TYPE=ST
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###5
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PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
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###1
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PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin
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###3
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PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin
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###4
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PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin
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###8 - Check for SMU firmware named either *.sbin or *.csbin
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### TODO: Remove *.sbin section after the blobs repo is updated.
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SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin
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ifeq ("$(wildcard $(SMUFWM_FILE))","")
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SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin
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# type = 0x1
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ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
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PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_WL_RV.sbin
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else
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PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_RV.sbin
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endif
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###95
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SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin
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# type = 0x5
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PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSignedRV.key
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###9
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PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key
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# types = 0x8 and 0x18
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PSP_SMUFW1_SUB1_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmwareRV2.csbin
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PSP_SMUFW1_SUB2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmwarePCO.csbin
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PSP_SMUFW2_SUB1_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2RV2.csbin
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PSP_SMUFW2_SUB2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2PCO.csbin
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ifeq ($(CONFIG_USE_PSPSECUREOS),y)
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###2
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PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin
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# type = 0x9
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PSP_SEC_DBG_KEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RavenSecureDebug_PublicKey.bin
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###12
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PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin)
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# type = 0xb - See #55758 (NDA) for bit definitions.
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PSP_SOFTFUSE="0x0000000010000001"
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###13
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TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin
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ifeq ($(CONFIG_USE_PSPSCUREOS),y)
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# types = 0x2, 0xc
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PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/psp_os_combined_prod_RV.sbin
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PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/dr_ftpm_prod_RV.csbin
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endif
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###18- Check for SMU firmware2 named either *.sbin or *.csbin
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### TODO: Remove *.sbin section after the blobs repo is updated.
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SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin
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ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","")
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SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin
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# type = 0x13
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PSP_SEC_DEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/secure_unlock_prod_RV.sbin
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# type = 0x21
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PSP_IKEK_FILE=$(top)/$(FIRMWARE_LOCATE)/PspIkekRV.bin
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# type = 0x24
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PSP_SECG1_FILE=$(top)/$(FIRMWARE_LOCATE)/security_policy_RV2_FP5_AM4.sbin
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PSP_SECG2_FILE=$(top)/$(FIRMWARE_LOCATE)/security_policy_PCO_FP5_AM4.sbin
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ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
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# type = 0x25
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PSP_MP2FW1_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2I2CFWRV2.sbin
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PSP_MP2FW2_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2I2CFWPCO.sbin
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# BIOS type = 0x6a
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PSP_MP2CFG_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2FWConfig.sbin
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else
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PSP_SOFTFUSE="0x0000000030000001"
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endif
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# type = 0x28
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PSP_DRIVERS_FILE=$(top)/$(FIRMWARE_LOCATE)/drv_sys_prod_RV.sbin
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ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
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PSP_S0I3_FILE=$(top)/$(FIRMWARE_LOCATE)/dr_agesa_prod_RV.sbin
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endif
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# types = 0x30 - 0x37
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PSP_ABL0_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader0_prod_RV.csbin
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PSP_ABL1_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader1_prod_RV.csbin
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PSP_ABL2_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader2_prod_RV.csbin
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PSP_ABL3_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader3_prod_RV.csbin
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PSP_ABL4_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader4_prod_RV.csbin
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PSP_ABL5_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader5_prod_RV.csbin
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PSP_ABL6_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader6_prod_RV.csbin
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PSP_ABL7_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader7_prod_RV.csbin
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# type = 0x3a
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ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
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PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
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endif
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#
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# BIOS Directory Table items - proper ordering is managed by amdfwtool
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#
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# type = 0x60
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PSP_APCB_FILE=$(call strip_quotes, $(CONFIG_PSP_APCB_FILE))
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# type = 0x61
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PSP_APOB_BASE=$(CONFIG_PSP_APOB_DESTINATION)
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# type = 0x62
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PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
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PSP_BIOSBIN_DEST=$(CONFIG_ROMSTAGE_ADDR)
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PSP_BIOSBIN_SIZE=$(CONFIG_RAM_RESET_VECTOR_STAGE_SIZE)
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# type = 0x63
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PSP_APOBNV_BASE=$(CONFIG_PSP_APOB_NV_ADDRESS)
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PSP_APOBNV_SIZE=$(CONFIG_PSP_APOB_NV_SIZE)
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# type2 = 0x64, 0x65
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PSP_PMUI_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Imem.csbin
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PSP_PMUI_FILE2=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Imem.csbin
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PSP_PMUI_FILE3=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Imem.csbin
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PSP_PMUI_FILE4=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Imem.csbin
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PSP_PMUD_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Dmem.csbin
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PSP_PMUD_FILE2=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Dmem.csbin
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PSP_PMUD_FILE3=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Dmem.csbin
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PSP_PMUD_FILE4=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Dmem.csbin
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# type = 0x66
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PSP_UCODE_FILE1=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_PCO_B1.bin
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PSP_UCODE_FILE2=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_PCO_B0.bin
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PSP_UCODE_FILE3=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_RV2_A0.bin
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#
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# Build the arguments to amdfwtool (order is unimportant). Missing file names
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# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
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#
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add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
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OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey)
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OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader)
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OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware)
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OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery)
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OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey)
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OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram)
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OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug)
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ifeq ($(CONFIG_USE_PSPSECUREOS),y)
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OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey)
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OPT_SMUFW1_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB1_FILE), --subprogram 1 --smufirmware)
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OPT_SMUFW1_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB2_FILE), --subprogram 2 --smufirmware)
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OPT_SMUFW2_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB1_FILE), --subprogram 1 --smufirmware2)
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OPT_SMUFW2_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB2_FILE), --subprogram 2 --smufirmware2)
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OPT_PSP_SEC_DBG_KEY_FILE=$(call add_opt_prefix, $(PSP_SEC_DBG_KEY_FILE), --securedebug)
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OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
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OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos)
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OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets)
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OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey)
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endif
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OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2)
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OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs)
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OPT_SEC_DEBUG_FILE=$(call add_opt_prefix, $(PSP_SEC_DEBUG_FILE), --secdebug)
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OPT_IKEK_FILE=$(call add_opt_prefix, $(PSP_IKEK_FILE), --ikek)
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OPT_SECG1_FILE=$(call add_opt_prefix, $(PSP_SECG1_FILE), --subprog 1 --sec-gasket)
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OPT_SECG2_FILE=$(call add_opt_prefix, $(PSP_SECG2_FILE), --subprog 2 --sec-gasket)
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OPT_MP2FW1_FILE=$(call add_opt_prefix, $(PSP_MP2FW1_FILE), --subprog 1 --mp2-fw)
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OPT_MP2FW2_FILE=$(call add_opt_prefix, $(PSP_MP2FW2_FILE), --subprog 2 --mp2-fw)
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OPT_DRIVERS_FILE=$(call add_opt_prefix, $(PSP_DRIVERS_FILE), --drv-entry-pts)
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||||
OPT_PSP_S0I3_FILE=$(call add_opt_prefix, $(PSP_S0I3_FILE), --s0i3drv)
|
||||
OPT_ABL0_FILE=$(call add_opt_prefix, $(PSP_ABL0_FILE), --abl-image)
|
||||
OPT_ABL1_FILE=$(call add_opt_prefix, $(PSP_ABL1_FILE), --abl-image)
|
||||
OPT_ABL2_FILE=$(call add_opt_prefix, $(PSP_ABL2_FILE), --abl-image)
|
||||
OPT_ABL3_FILE=$(call add_opt_prefix, $(PSP_ABL3_FILE), --abl-image)
|
||||
OPT_ABL4_FILE=$(call add_opt_prefix, $(PSP_ABL4_FILE), --abl-image)
|
||||
OPT_ABL5_FILE=$(call add_opt_prefix, $(PSP_ABL5_FILE), --abl-image)
|
||||
OPT_ABL6_FILE=$(call add_opt_prefix, $(PSP_ABL6_FILE), --abl-image)
|
||||
OPT_ABL7_FILE=$(call add_opt_prefix, $(PSP_ABL7_FILE), --abl-image)
|
||||
OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
|
||||
|
||||
OPT_PSP_APCB_FILE=$(call add_opt_prefix, $(PSP_APCB_FILE), --apcb)
|
||||
OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
|
||||
OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
|
||||
OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
|
||||
OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
|
||||
OPT_APOBNV_ADDR=$(call add_opt_prefix, $(PSP_APOBNV_BASE), --apob-nv-base)
|
||||
OPT_APOBNV_SIZE=$(call add_opt_prefix, $(PSP_APOBNV_SIZE), --apob-nv-size)
|
||||
OPT_PSP_PMUI_FILE1=$(call add_opt_prefix, $(PSP_PMUI_FILE1), --subprogram 0 --instance 1 --pmu-inst)
|
||||
OPT_PSP_PMUI_FILE2=$(call add_opt_prefix, $(PSP_PMUI_FILE2), --subprogram 0 --instance 4 --pmu-inst)
|
||||
OPT_PSP_PMUI_FILE3=$(call add_opt_prefix, $(PSP_PMUI_FILE3), --subprogram 1 --instance 1 --pmu-inst)
|
||||
OPT_PSP_PMUI_FILE4=$(call add_opt_prefix, $(PSP_PMUI_FILE4), --subprogram 1 --instance 4 --pmu-inst)
|
||||
OPT_PSP_PMUD_FILE1=$(call add_opt_prefix, $(PSP_PMUD_FILE1), --subprogram 0 --instance 1 --pmu-data)
|
||||
OPT_PSP_PMUD_FILE2=$(call add_opt_prefix, $(PSP_PMUD_FILE2), --subprogram 0 --instance 4 --pmu-data)
|
||||
OPT_PSP_PMUD_FILE3=$(call add_opt_prefix, $(PSP_PMUD_FILE3), --subprogram 1 --instance 1 --pmu-data)
|
||||
OPT_PSP_PMUD_FILE4=$(call add_opt_prefix, $(PSP_PMUD_FILE4), --subprogram 1 --instance 4 --pmu-data)
|
||||
OPT_PSP_UCODE_FILE1=$(call add_opt_prefix, $(PSP_UCODE_FILE1), --instance 0 --ucode)
|
||||
OPT_PSP_UCODE_FILE2=$(call add_opt_prefix, $(PSP_UCODE_FILE2), --instance 1 --ucode)
|
||||
OPT_PSP_UCODE_FILE3=$(call add_opt_prefix, $(PSP_UCODE_FILE3), --instance 2 --ucode)
|
||||
OPT_MP2CFG_FILE=$(call add_opt_prefix, $(PSP_MP2CFG_FILE), --mp2-config)
|
||||
|
||||
$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
|
||||
$(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \
|
||||
$(call strip_quotes, $(PSPBTLDR_FILE)) \
|
||||
$(call strip_quotes, $(PSPRCVR_FILE)) \
|
||||
$(call strip_quotes, $(PSPSCUREOS_FILE)) \
|
||||
$(call strip_quotes, $(PSPNVRAM_FILE)) \
|
||||
$(call strip_quotes, $(SMUFWM_FILE)) \
|
||||
$(call strip_quotes, $(SMUSCS_FILE)) \
|
||||
$(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \
|
||||
$(call strip_quotes, $(PSP_SEC_DBG_KEY_FILE)) \
|
||||
$(call strip_quotes, $(PSPTRUSTLETS_FILE)) \
|
||||
$(call strip_quotes, $(TRUSTLETKEY_FILE)) \
|
||||
$(call strip_quotes, $(SMUFIRMWARE2_FILE)) \
|
||||
$(call strip_quotes, $(PSP_APCB_FILE)) \
|
||||
$(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
|
||||
$(call strip_quotes, $(PSP_PMUI_FILE1)) \
|
||||
$(call strip_quotes, $(PSP_PMUI_FILE2)) \
|
||||
$(call strip_quotes, $(PSP_PMUI_FILE3)) \
|
||||
$(call strip_quotes, $(PSP_PMUI_FILE4)) \
|
||||
$(call strip_quotes, $(PSP_PMUD_FILE1)) \
|
||||
$(call strip_quotes, $(PSP_PMUD_FILE2)) \
|
||||
$(call strip_quotes, $(PSP_PMUD_FILE3)) \
|
||||
$(call strip_quotes, $(PSP_PMUD_FILE4)) \
|
||||
$(call strip_quotes, $(PSP_UCODE_FILE1)) \
|
||||
$(call strip_quotes, $(PSP_UCODE_FILE2)) \
|
||||
$(call strip_quotes, $(PSP_UCODE_FILE3)) \
|
||||
$(call strip_quotes, $(PSP_MP2CFG_FILE)) \
|
||||
$(call strip_quotes, $(PSP_SMUFW1_SUB1_FILE)) \
|
||||
$(call strip_quotes, $(PSP_SMUFW1_SUB2_FILE)) \
|
||||
$(call strip_quotes, $(PSP_SMUFW2_SUB1_FILE)) \
|
||||
$(call strip_quotes, $(PSP_SMUFW2_SUB2_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL0_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL1_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL2_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL3_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL4_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL5_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL6_FILE)) \
|
||||
$(call strip_quotes, $(PSP_ABL7_FILE)) \
|
||||
$(call strip_quotes, $(PSP_WHITELIST_FILE)) \
|
||||
$(call strip_quotes, $(PSP_SECG1_FILE)) \
|
||||
$(call strip_quotes, $(PSP_SECG2_FILE)) \
|
||||
$(call_strip_quotes, $(PSP_DRIVERS_FILE)) \
|
||||
$(call_strip_quotes, $(PSP_S0I3_FILE)) \
|
||||
$(call_strip_quotes, $(PSP_IKEK_FILE)) \
|
||||
$(call_strip_quotes, $(PSP_SEC_DEBUG_FILE)) \
|
||||
$(AMDFWTOOL)
|
||||
rm -f $@
|
||||
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
|
||||
$(AMDFWTOOL) \
|
||||
$(OPT_AMD_PUBKEY_FILE) \
|
||||
$(OPT_PSPBTLDR_FILE) \
|
||||
$(OPT_SMUFWM_FILE) \
|
||||
$(OPT_PSPRCVR_FILE) \
|
||||
$(OPT_PUBSIGNEDKEY_FILE) \
|
||||
$(OPT_PSPSCUREOS_FILE) \
|
||||
$(OPT_PSPNVRAM_FILE) \
|
||||
$(OPT_PSPSECUREDEBUG_FILE) \
|
||||
$(OPT_PSP_SEC_DBG_KEY_FILE) \
|
||||
$(OPT_PSPTRUSTLETS_FILE) \
|
||||
$(OPT_TRUSTLETKEY_FILE) \
|
||||
$(OPT_SMUFIRMWARE2_FILE) \
|
||||
$(OPT_SMUSCS_FILE) \
|
||||
$(OPT_AMD_PUBKEY_FILE) \
|
||||
$(OPT_PSPBTLDR_FILE) \
|
||||
$(OPT_SMUFWM_FILE) \
|
||||
$(OPT_PSPRCVR_FILE) \
|
||||
$(OPT_PUBSIGNEDKEY_FILE) \
|
||||
$(OPT_PSPSCUREOS_FILE) \
|
||||
$(OPT_PSPNVRAM_FILE) \
|
||||
$(OPT_PSPSECUREDEBUG_FILE) \
|
||||
$(OPT_PSPTRUSTLETS_FILE) \
|
||||
$(OPT_TRUSTLETKEY_FILE) \
|
||||
$(OPT_SMUFIRMWARE2_FILE) \
|
||||
$(OPT_SMUSCS_FILE) \
|
||||
$(OPT_SMUFW1_SUB2_FILE) \
|
||||
$(OPT_SMUFW2_SUB2_FILE) \
|
||||
$(OPT_SMUFW1_SUB1_FILE) \
|
||||
$(OPT_SMUFW2_SUB1_FILE) \
|
||||
$(OPT_PSP_APCB_FILE) \
|
||||
$(OPT_APOB_ADDR) \
|
||||
$(OPT_APOBNV_ADDR) \
|
||||
$(OPT_APOBNV_SIZE) \
|
||||
$(OPT_PSP_BIOSBIN_FILE) \
|
||||
$(OPT_PSP_BIOSBIN_DEST) \
|
||||
$(OPT_PSP_BIOSBIN_SIZE) \
|
||||
$(OPT_PSP_SOFTFUSE) \
|
||||
$(OPT_PSP_PMUI_FILE1) \
|
||||
$(OPT_PSP_PMUI_FILE2) \
|
||||
$(OPT_PSP_PMUI_FILE3) \
|
||||
$(OPT_PSP_PMUI_FILE4) \
|
||||
$(OPT_PSP_PMUD_FILE1) \
|
||||
$(OPT_PSP_PMUD_FILE2) \
|
||||
$(OPT_PSP_PMUD_FILE3) \
|
||||
$(OPT_PSP_PMUD_FILE4) \
|
||||
$(OPT_PSP_UCODE_FILE1) \
|
||||
$(OPT_PSP_UCODE_FILE2) \
|
||||
$(OPT_PSP_UCODE_FILE3) \
|
||||
$(OPT_MP2CFG_FILE) \
|
||||
$(OPT_ABL0_FILE) \
|
||||
$(OPT_ABL1_FILE) \
|
||||
$(OPT_ABL2_FILE) \
|
||||
$(OPT_ABL3_FILE) \
|
||||
$(OPT_ABL4_FILE) \
|
||||
$(OPT_ABL5_FILE) \
|
||||
$(OPT_ABL6_FILE) \
|
||||
$(OPT_ABL7_FILE) \
|
||||
$(OPT_WHITELIST_FILE) \
|
||||
$(OPT_SECG1_FILE) \
|
||||
$(OPT_SECG2_FILE) \
|
||||
$(OPT_MP2FW1_FILE) \
|
||||
$(OPT_MP2FW2_FILE) \
|
||||
$(OPT_DRIVERS_FILE) \
|
||||
$(OPT_PSP_S0I3_FILE) \
|
||||
$(OPT_IKEK_FILE) \
|
||||
$(OPT_SEC_DEBUG_FILE) \
|
||||
--combo-capable \
|
||||
--token-unlock \
|
||||
--flashsize $(CONFIG_ROM_SIZE) \
|
||||
--location $(shell printf "0x%x" $(PICASSO_FWM_POSITION)) \
|
||||
--output $@
|
||||
|
||||
USE_BIOS_FILE=$(obj)/cbfs/fallback/romstage.elf
|
||||
$(PSP_BIOSBIN_FILE): $(obj)/cbfs/fallback/romstage.elf $(AMDCOMPRESS)
|
||||
rm -f $@
|
||||
@printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
|
||||
$(AMDCOMPRESS) --infile $(USE_BIOS_FILE) --outfile $@ --compress \
|
||||
--maxsize $(PSP_BIOSBIN_SIZE)
|
||||
|
||||
ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
|
||||
PHONY+=add_amdfw
|
||||
INTERMEDIATE+=add_amdfw
|
||||
|
|
@ -229,8 +394,9 @@ PICASSO_FWM_ROM_POSITION=$(call int-add, \
|
|||
add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom
|
||||
printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
|
||||
"$(PICASSO_FWM_ROM_POSITION)"
|
||||
dd if=$(obj)/amdfw.rom \
|
||||
of=$(obj)/coreboot.pre conv=notrunc bs=1 \
|
||||
dd oflag=seek_bytes \
|
||||
if=$(obj)/amdfw.rom \
|
||||
of=$(obj)/coreboot.pre conv=notrunc \
|
||||
seek=$(PICASSO_FWM_ROM_POSITION) >/dev/null 2>&1
|
||||
|
||||
else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
|
||||
|
|
@ -242,11 +408,4 @@ apu/amdfw-type := raw
|
|||
|
||||
endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
|
||||
|
||||
cbfs-files-y += smu_fw
|
||||
cbfs-files-y += smu_fw2
|
||||
smu_fw-file := $(SMUFWM_FILE)
|
||||
smu_fw-type := raw
|
||||
smu_fw2-file := $(SMUFIRMWARE2_FILE)
|
||||
smu_fw2-type := raw
|
||||
|
||||
endif # ($(CONFIG_SOC_AMD_PICASSO),y)
|
||||
|
|
|
|||
Loading…
Reference in New Issue