Documentation: Fix toctree and remove dead links

Change-Id: Ie3c7c33096f60a5aa476ff55c538fe68ffadc068
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

Documentation/drivers/index.md

@@ -4,7 +4,9 @@ The drivers can be found in `src/drivers`. They are intended for onboard
 and plugin devices, significantly reducing integration complexity and
 they allow to easily reuse existing code accross platforms.
 
+* [Intel DPTF](dptf.md)
 * [IPMI KCS](ipmi_kcs.md)
 * [SMMSTORE](smmstore.md)
 * [SoundWire](soundwire.md)
 * [SMMSTOREv2](smmstorev2.md)
+* [USB4 Retimer](retimer.md)

Documentation/mainboard/index.md

@@ -16,6 +16,7 @@ This section contains documentation about coreboot on specific mainboards.
 
 ## ASUS
 
+- [A88XM-E](asus/a88xm-e.md)
 - [F2A85-M](asus/f2a85-m.md)
 - [P5Q](asus/p5q.md)
 - [P8H61-M LX](asus/p8h61-m_lx.md)

Documentation/soc/intel/icelake/iceLake_coreboot_development.md

@@ -20,11 +20,6 @@ Like any other Intel SoC, Ice Lake coreboot development is also based on "Intel
    :doc:`../../../mainboard/intel/icelake_rvp`
    ```
 
-3. OEMs to design based on reference platform and make use of mainboard sample code. Dragonegg is Ice Lake based mainboard developed by Google
-   ```eval_rst
-   :doc:`../../../mainboard/google/dragonegg`
-   ```
-
 ### Summary:
 * SoC is Ice Lake.
 * Reference platform is icelake_rvp.

Documentation/soc/intel/index.md

@@ -11,4 +11,4 @@ This section contains documentation about coreboot on specific Intel SOCs.
 - [Microcode Updates](microcode.md)
 - [Firmware Interface Table](fit.md)
 - [Apollolake](apollolake/index.md)
-- [CSE FW Update](cse_fw_update/cse_fw_update_model.md)
+- [CSE FW Update](cse_fw_update/cse_fw_update.md)