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mb/google/dedede/var/galtic: Add charger throttling function 

Add charger current throttling support for galtic
  control charger index * 64 = Value mA
    32*64=2048
    28*64=1792
    24*64=1536
    20*64=1280

BUG=b:187231627
TEST=Built and tested on boten system

Cq-Depend: chrome-internal:3846209
Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com>
Change-Id: I5e1849551ff051bca591f19f9e40da4c89ab74e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Yang <paul.f.yang@intel.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
FrankChu 2021-05-19 17:25:27 +08:00 committed by Nick Vaccaro
parent eb07e4c957
commit 627bc558ec
1 changed files with 9 additions and 1 deletions
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10
src/mainboard/google/dedede/variants/galtic/overridetree.cb
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@ -66,7 +66,7 @@ chip soc/intel/jasperlake
## Passive Policy ## Passive Policy
register "policies.passive" = "{ register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 67, 1000), [0] = DPTF_PASSIVE(CPU, CPU, 67, 1000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 62, 1000), [1] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_0, 62, 1000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 58, 1000), [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 58, 1000),
[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 40, 1000) [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 40, 1000)
}" }"
@ -101,6 +101,14 @@ chip soc/intel/jasperlake
register "options.tsr[1].desc" = ""Vcore"" register "options.tsr[1].desc" = ""Vcore""
register "options.tsr[2].desc" = ""Ambient"" register "options.tsr[2].desc" = ""Ambient""
## Charger Performance Control (Control, mA)
register "controls.charger_perf" = "{
[0] = { 32, 2048 },
[1] = { 28, 1792 },
[2] = { 24, 1536 },
[3] = { 20, 1280 }
}"
device generic 0 on end device generic 0 on end
end end
end # SA Thermal device end # SA Thermal device