rockchip/rk3399: provide multiple SDRAM configurations

We want to be able to easily change SDRAM clock rate for debugging
purposes. This patch adds configurations for 4 different clock rates.

Same configs are used for all rk3399 boards at 200, 666 and 800 MHz.
Kevin board does not run reliably at 666 MHz, an option for it is
added to run at 300 MHz, this option is available to Kevin only.

There is not much room left in the coreboot romstage section, this is
why the config file for 928 MHz is being added with this patch but is
not included in the code, one of the lower frequency options will have
to be dropped for the higher frequency option to be added.

BRANCH=none
BUG=chrome-os-partner:54144
TEST=run "stressapptest -M 1024 -s 3600" and pass on both kevin and
     gru. Verified that on Kevin the firmware reports starting up
     SDRAM at 300 MHz and on Gru at 800 MHz.

Change-Id: Ie24c1813d5a0e9f0f9bfc781cade9e28fb6eb2f1
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: ef5e4551b79c3f0531f9af35491f2c593f8482f1
Original-Change-Id: I08bccd40147ad89d851b995a8aab4d2b6da8258a
Original-Signed-off-by: Lin Huang <hl@rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/353493
Original-Reviewed-by: Derek Basehore <dbasehore@chromium.org>
Reviewed-on: https://review.coreboot.org/15309
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/mainboard/google/gru/sdram_configs.c

@@ -22,21 +22,35 @@
 #include <types.h>
 
 static struct rk3399_sdram_params sdram_configs[] = {
-#if IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU)
+#include "sdram_inf/sdram-lpddr3-hynix-4GB-200.inc"
-#include "sdram_inf/gru-sdram-lpddr3-hynix-4GB.inc"
+/* THIS IS FOR KEVIN ONLY! crosbug.com/p/54144 */
-#elif IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN)
 #include "sdram_inf/kevin-sdram-lpddr3-hynix-4GB.inc"
-#else
+#include "sdram_inf/sdram-lpddr3-hynix-4GB-666.inc"
-#error "What is your board name?"
+#include "sdram_inf/sdram-lpddr3-hynix-4GB-800.inc"
-#endif
+/* #include "sdram_inf/sdram-lpddr3-hynix-4GB-928.inc" */
+};
+
+enum dram_speeds {
+	dram_200MHz = 0,
+	dram_300MHz = 1,
+	dram_666MHz = 2,
+	dram_800MHz = 3,
+/*	dram_928MHz = 4, */
 };
 
 const struct rk3399_sdram_params *get_sdram_config()
 {
-	u32 ramcode = ram_code();
+	enum dram_speeds speed;
 
-	if (ramcode >= ARRAY_SIZE(sdram_configs)
+	if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN))
-			|| sdram_configs[ramcode].dramtype == UNUSED)
+		speed = dram_300MHz;
-		die("Invalid RAMCODE.");
+	else if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU))
-	return &sdram_configs[ramcode];
+		speed = dram_800MHz;
+	else
+		speed = dram_200MHz;
+
+	printk(BIOS_INFO, "Using SDRAM configuration for %d MHz\n",
+	       sdram_configs[speed].ddr_freq / (1000 * 1000));
+
+	return &sdram_configs[speed];
 }

src/mainboard/google/gru/sdram_inf/sdram-lpddr3-hynix-4GB-928.inc

@@ -24,10 +24,10 @@
 			.cs1_row = 0xF,
 			.ddrconfig = 1,
 			{
-				{0x1d191519},
+				{0x201d181e},
-				{0x14040808},
+				{0x17050a08},
 				{0x00000002},
-				{0x00006226},
+				{0x00006426},
 				{0x00000054},
 				0x00000000
 			}
@@ -43,16 +43,16 @@
 			.cs1_row = 0xF,
 			.ddrconfig = 1,
 			{
-				{0x1d191519},
+				{0x201d181e},
-				{0x14040808},
+				{0x17050a08},
 				{0x00000002},
-				{0x00006226},
+				{0x00006426},
 				{0x00000054},
 				0x00000000
 			}
 		}
 	},
-	.ddr_freq = 300*MHz,
+	.ddr_freq = 928*MHz,
 	.dramtype = LPDDR3,
 	.num_channels = 2,
 	.stride = 13,