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AGESA: Remove redundant and invalid IRQ routing 

The size of the array did not match that of the actual
allocation. Furthermore, the tables are written as
part of set_pci_irqs() in hudson/pci.c.

Also the removed code was never reached runtime, as it is
only executed on ACPI S3 resume path that is currently
disabled.

Change-Id: If1c47d53a7656bdff40d93fc132c8c057184ae46
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18587
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Kyösti Mälkki 2017-03-02 23:36:08 +02:00
parent 7580e4f3d2
commit 627d790651
1 changed files with 0 additions and 14 deletions
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14
src/southbridge/amd/agesa/hudson/agesawrapper.c
View File

@ -35,8 +35,6 @@
#include <device/device.h>
#include "hudson.h"
extern UINT8 picr_data[0x54], intr_data[0x54];
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
#error Use of GetHeapBase() is incorrect or at least suspicious
#endif
@ -64,7 +62,6 @@ AGESA_STATUS agesawrapper_fchs3laterestore (void)
{
FCH_DATA_BLOCK FchParams;
AMD_CONFIG_PARAMS StdHeader;
UINT8 byte;
StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
StdHeader.HeapBasePtr = (uintptr_t) GetHeapBase() + 0x10;
@ -76,17 +73,6 @@ AGESA_STATUS agesawrapper_fchs3laterestore (void)
FchParams.StdHeader = &StdHeader;
s3_resume_init_data(&FchParams);
FchInitS3LateRestore(&FchParams);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
outb(byte, 0xC00);
outb(picr_data[byte], 0xC01);
}
/* APIC IRQ routine */
for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
outb(byte | 0x80, 0xC00);
outb(intr_data[byte], 0xC01);
}
return AGESA_SUCCESS;
}