mb/roda/rk886ex: Convert *.asl to ASL 2.0 syntax
Generated 'build/dsdt.dsl' files are identical. Change-Id: I2eea24db6cfd260e0f36243e90a5e01b360f23fb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
parent
527690c7bf
commit
62a437dd88
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@ -69,76 +69,76 @@ Device (BAT1)
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/* Update Battery Info */
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Method(UPBI, 0)
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{
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Store (0x78, Index(PBIF, 1))
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Store (0x64, Index(PBIF, 2))
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Store (0x2b5c, Index(PBIF, 4))
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Store ("Bat1", Index(PBIF, 9))
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Store ("001", Index(PBIF, 10))
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Store ("LION", Index(PBIF, 11))
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Store ("Panasonic", Index(PBIF, 12))
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PBIF [1] = 0x78
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PBIF [2] = 0x64
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PBIF [4] = 0x2b5c
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PBIF [9] = "Bat1"
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PBIF [10] = "001"
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PBIF [11] = "LION"
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PBIF [12] = "Panasonic"
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}
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Method(UPBS, 0)
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{
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Store(\_SB.PCI0.LPCB.EC0.QEVT, Local0)
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If (Not(Local0)) {
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Store(0, GP38)
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Local0 = \_SB.PCI0.LPCB.EC0.QEVT
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If (~Local0) {
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GP38 = 0
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Sleep(0x64)
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Store(GP38, Local0)
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If (Not(Local0)) {
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Store (RDW(0x0d), Local0)
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If (LNotEqual(Local0, 0xeeee)) {
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If (LLessEqual(Local0, 0x64)) {
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Store(Local0, CBA1)
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Local0 = GP38
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If (~Local0) {
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Local0 = RDW (0x0d)
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If (Local0 != 0xeeee) {
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If (Local0 <= 0x64) {
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CBA1 = Local0
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}
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}
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}
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}
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Store (CBA1, Local0)
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Store (Local0, Index(PBST, 2))
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Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
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Store (0, Local1)
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Local0 = CBA1
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PBST [2] = Local0
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PBST [3] = DerefOf (PBIF [4])
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Local1 = 0
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If (PWRS) {
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If (LLess(Local0, 0x64)) {
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Store (2, Local1)
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If (Local0 < 0x64) {
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Local1 = 2
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}
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} Else {
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If (LLessEqual(Local0, 0x5)) {
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Store (4, Local1)
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If (Local0 <= 0x5) {
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Local1 = 4
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} Else {
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Store (1, Local1)
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Local1 = 1
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}
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}
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Store (Local1, Index(PBST, 0))
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PBST [0] = Local1
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If (\_SB.PCI0.LPCB.EC0.P63S) {
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Store (0x16, Index(PBST, 1))
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PBST [1] = 0x16
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} Else {
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Store (0x0b, Index(PBST, 1))
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PBST [1] = 0x0b
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}
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}
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// Invalidate Battery Info
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Method(IVBI, 0)
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{
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Store (0xffffffff, Index(PBIF, 1))
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Store (0xffffffff, Index(PBIF, 2))
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Store (0xffffffff, Index(PBIF, 4))
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Store ("Bad", Index(PBIF, 9))
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Store ("Bad", Index(PBIF, 10))
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Store ("Bad", Index(PBIF, 11))
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Store ("Bad", Index(PBIF, 12))
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Store (1, Index(PBIF, 0))
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PBIF [1] = 0xffffffff
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PBIF [2] = 0xffffffff
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PBIF [4] = 0xffffffff
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PBIF [9] = "Bad"
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PBIF [10] = "Bad"
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PBIF [11] = "Bad"
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PBIF [12] = "Bad"
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PBIF [0] = 1
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}
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Method(IVBS, 0)
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{
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Store (0x0, Index(PBST, 0))
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Store (0xffffffff, Index(PBST, 1))
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Store (0xffffffff, Index(PBST, 2))
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Store (0xffffffff, Index(PBST, 3))
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PBST [0] = 0
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PBST [1] = 0xffffffff
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PBST [2] = 0xffffffff
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PBST [3] = 0xffffffff
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}
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}
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@ -209,85 +209,85 @@ Device (BAT2)
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/* Update Battery Info */
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Method(UPBI, 0)
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{
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Store (0x78, Index(PBIF, 1))
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Store (0x64, Index(PBIF, 2))
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Store (0x2b5c, Index(PBIF, 4))
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Store ("Bat2", Index(PBIF, 9))
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Store ("002", Index(PBIF, 10))
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Store ("LION", Index(PBIF, 11))
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Store ("Panasonic", Index(PBIF, 12))
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PBIF [1] = 0x78
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PBIF [2] = 0x64
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PBIF [4] = 0x2b5c
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PBIF [9] = "Bat2"
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PBIF [10] = "002"
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PBIF [11] = "LION"
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PBIF [12] = "Panasonic"
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}
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Method(UPBS, 0)
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{
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Store(\_SB.PCI0.LPCB.EC0.QEVT, Local0)
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If (Not(Local0)) {
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Store(0, GP38)
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Local0 = \_SB.PCI0.LPCB.EC0.QEVT
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If (~Local0) {
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GP38 = 0
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Sleep(0x64)
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Store(GP38, Local0)
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If (Not(Local0)) {
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Store (RDW(0x0d), Local0)
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If (LNotEqual(Local0, 0xeeee)) {
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If (LLessEqual(Local0, 0x64)) {
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Store(Local0, CBA2)
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Local0 = GP38
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If (~Local0) {
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Local0 = RDW (0x0d)
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If (Local0 != 0xeeee) {
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If (Local0 <= 0x64) {
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CBA2 = Local0
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}
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}
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}
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}
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Store (CBA2, Local0)
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Store (Local0, Index(PBST, 2))
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Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
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Store (0, Local1)
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Local0 = CBA2
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PBST [2] = Local0
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PBST [3] = DerefOf (PBIF [4])
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Local1 = 0
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If (PWRS) {
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If (LLess(Local0, 0x64)) {
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Store (2, Local1)
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If (Local0 < 0x64) {
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Local1 = 2
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}
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} Else {
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If (LLessEqual(Local0, 0x5)) {
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Store (4, Local1)
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If (Local0 <= 0x5) {
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Local1 = 4
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} Else {
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Store (1, Local1)
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Local1 = 1
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}
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}
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Store (Local1, Index(PBST, 0))
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PBST [0] = Local1
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If (\_SB.PCI0.LPCB.EC0.P62S) {
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Store (0x16, Index(PBST, 1))
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PBST [1] = 0x16
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} Else {
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Store (0x0b, Index(PBST, 1))
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PBST [1] = 0x0b
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}
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}
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// Invalidate Battery Info
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Method(IVBI, 0)
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{
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Store (0xffffffff, Index(PBIF, 1))
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Store (0xffffffff, Index(PBIF, 2))
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Store (0xffffffff, Index(PBIF, 4))
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Store ("Bad", Index(PBIF, 9))
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Store ("Bad", Index(PBIF, 10))
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Store ("Bad", Index(PBIF, 11))
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Store ("Bad", Index(PBIF, 12))
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Store (1, Index(PBIF, 0))
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PBIF [1] = 0xffffffff
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PBIF [2] = 0xffffffff
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PBIF [4] = 0xffffffff
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PBIF [9] = "Bad"
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PBIF [10] = "Bad"
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PBIF [11] = "Bad"
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PBIF [12] = "Bad"
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PBIF [0] = 1
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}
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Method(IVBS, 0)
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{
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Store (0x0, Index(PBST, 0))
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Store (0xffffffff, Index(PBST, 1))
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Store (0xffffffff, Index(PBST, 2))
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Store (0xffffffff, Index(PBST, 3))
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PBST [0] = 0
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PBST [1] = 0xffffffff
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PBST [2] = 0xffffffff
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PBST [3] = 0xffffffff
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}
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}
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Method (RDW, 1)
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{
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Store (0x16, \_SB.PCI0.LPCB.EC0.SMAD)
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Store (Arg0, \_SB.PCI0.LPCB.EC0.SMCM)
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Store (0x09, \_SB.PCI0.LPCB.EC0.SMPR)
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While (LNotEqual(\_SB.PCI0.LPCB.EC0.SMPR, 0x00)) {
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\_SB.PCI0.LPCB.EC0.SMAD = 0x16
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\_SB.PCI0.LPCB.EC0.SMCM = Arg0
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\_SB.PCI0.LPCB.EC0.SMPR = 0x09
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While (\_SB.PCI0.LPCB.EC0.SMPR != 0x00) {
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Stall (1)
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}
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@ -300,11 +300,11 @@ Device (ADP1)
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Method (_PSR, 0)
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{
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If (\_SB.PCI0.LPCB.EC0.ECON) {
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Store (\_SB.PCI0.LPCB.EC0.P60S, Local0)
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Local0 = \_SB.PCI0.LPCB.EC0.P60S
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If (Local0) {
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Store (0, PWRS)
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PWRS = 0
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} Else {
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Store (1, PWRS)
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PWRS = 1
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}
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}
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@ -63,8 +63,8 @@ Device(EC0)
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// This method is needed by Windows XP/2000 for
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// EC initialization before a driver is loaded
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If (LEqual(Arg0, 0x03)) {
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Store (Arg1, ECON)
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If (Arg0 == 0x03) {
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ECON = Arg1
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}
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}
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@ -72,20 +72,20 @@ Device(EC0)
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Method (_Q11, 0)
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{
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Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug)
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Debug = "_Q11: Fn-F8 (Sleep Button) pressed"
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Notify(SLPB, 0x80)
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}
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Method (_Q12, 0)
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{
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Store("_Q12: Fn-F9 (Display Switch) pressed", Debug)
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Debug = "_Q12: Fn-F9 (Display Switch) pressed"
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Notify (\_SB.PCI0.GFX0, 0x82)
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// Store(1, TLST)
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// TLST = 1
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}
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Method (_Q30, 0)
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{
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Store("_Q30: AC In/Out", Debug)
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Debug = "_Q30: AC In/Out"
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Notify(ADP1, 0x80) // Tell the Power Adapter
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PNOT() // and the CPU and Battery
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// Notify the Batteries
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@ -95,16 +95,16 @@ Device(EC0)
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Method (_Q31, 0)
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{
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Store("_Q31: LID Open/Close", Debug)
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Debug = "_Q31: LID Open/Close"
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Notify(LID0, 0x80)
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}
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Method (_Q32, 0)
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{
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Store("_Q32: Battery 1 In/Out", Debug)
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Debug = "_Q32: Battery 1 In/Out"
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If (ECON) {
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Store (P62S, Local0)
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If (Not(Local0)) {
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Local0 = P62S
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If (~Local0) {
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Notify(BAT1, 0x80)
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}
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}
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@ -112,10 +112,10 @@ Device(EC0)
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Method (_Q33, 0)
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{
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Store("_Q33: Battery 2 In/Out", Debug)
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Debug = "_Q33: Battery 2 In/Out"
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If (ECON) {
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Store (P63S, Local0)
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If (Not(Local0)) {
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Local0 = P63S
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If (~Local0) {
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Notify(BAT2, 0x80)
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}
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}
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@ -123,33 +123,33 @@ Device(EC0)
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Method (_Q34, 0)
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{
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Store("_Q34: LPT/FDD", Debug)
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Debug = "_Q34: LPT/FDD"
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// PHSS(0x70)
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}
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Method (_Q35, 0)
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{
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Store("_Q35: Processor is hot", Debug)
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Debug = "_Q35: Processor is hot"
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}
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Method (_Q36, 0)
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{
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Store("_Q36: Thermal Warning", Debug)
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Debug = "_Q36: Thermal Warning"
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}
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Method (_Q37, 0)
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{
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Store("_Q37: PME", Debug)
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Debug = "_Q37: PME"
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}
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Method (_Q38, 0)
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{
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Store("_Q38: Thermal", Debug)
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Debug = "_Q38: Thermal"
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}
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Method (_Q39, 0)
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{
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Store("_Q39: Thermal", Debug)
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Debug = "_Q39: Thermal"
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}
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// TODO Scope _SB devices for AC power, LID, Power button
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@ -20,12 +20,12 @@ Method(_WAK,1)
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// was inserted while a sleep state was active.
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// Are we going to S3?
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If (LEqual(Arg0, 3)) {
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If (Arg0 == 3) {
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// ..
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}
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// Are we going to S4?
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If (LEqual(Arg0, 4)) {
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If (Arg0 == 4) {
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// ..
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}
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@ -56,7 +56,7 @@ Scope(\_SB)
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* running: Windows XP SP1 needs to have C-State coordination
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* enabled in SMM.
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*/
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If (LAnd(LEqual(OSYS, 2001), MPEN)) {
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If ((OSYS == 2001) && MPEN) {
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// TRAP(61) // TODO
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}
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@ -19,13 +19,13 @@ Device (SIO1)
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Method (READ, 3)
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{
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Acquire (SIOM, 0xffff)
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If (LEqual(Arg0, 0)) {
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Store (0x55, INDX)
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Store (Arg1, INDX)
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Store (DATA, Local1)
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Store (0xaa, INDX)
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If (Arg0 == 0) {
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INDX = 0x55
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INDX = Arg1
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Local1 = DATA
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INDX = 0xaa
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}
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And (Local1, Arg2, Local1)
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Local1 &= Arg2
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Release(SIOM)
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Return(Local1)
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}
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@ -33,11 +33,11 @@ Device (SIO1)
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Method (WRIT, 3)
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{
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Acquire (SIOM, 0xffff)
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If (LEqual(Arg0, 0)) {
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Store (0x55, INDX)
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Store (Arg1, INDX)
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Store (Arg2, DATA)
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Store (0xaa, INDX)
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If (Arg0 == 0) {
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INDX = 0x55
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INDX = Arg1
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DATA = Arg2
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INDX = 0xaa
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}
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Release(SIOM)
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}
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@ -52,18 +52,18 @@ Device (SIO1)
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Method (_STA, 0)
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{
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// Device disabled by coreboot?
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If (LEqual(CMAP, 0)) {
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If (CMAP == 0) {
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Return (0)
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}
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// Is the hardware enabled?
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Store (READ(0, 0x24, 0xff), Local0)
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If (LEqual(Local0, 0)) {
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Local0 = READ (0, 0x24, 0xff)
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If (Local0 == 0) {
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Return (0xd)
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} Else {
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// Power Enabled?
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Store (READ(0, 0x02, 0x08), Local0)
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If (LEqual(Local0, 0)) {
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Local0 = READ (0, 0x02, 0x08)
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If (Local0 == 0) {
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Return (0x0d)
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} Else {
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Return (0x0f)
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@ -76,12 +76,12 @@ Device (SIO1)
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{
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WRIT(0, 0x24, 0x00)
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Store(READ(0, 0x28, 0x0f), Local0)
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Local0 = READ (0, 0x28, 0x0f)
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WRIT(0, 0x28, Local0)
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Store(READ(0, 0x02, 0xff), Local0)
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Not(0x08, Local1)
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And(Local0, Local1, Local0)
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Local0 = READ (0, 0x02, 0xff)
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Local1 = ~0x08
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Local0 &= Local1
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WRIT(0, 0x02, Local0)
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}
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@ -106,8 +106,8 @@ Device (SIO1)
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IRQNoFlags(_IRA) { 4 }
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})
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And (_STA(), 0x02, Local0)
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If (LEqual(Local0, 0)) {
|
||||
Local0 = _STA() & 0x02
|
||||
If (Local0 == 0) {
|
||||
Return(NONE)
|
||||
}
|
||||
|
||||
|
@ -119,15 +119,15 @@ Device (SIO1)
|
|||
\_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQ)
|
||||
|
||||
/* I/O Base */
|
||||
Store (READ(0, 0x24, 0xfe), Local0)
|
||||
ShiftLeft(Local0, 0x02, Local0)
|
||||
Store(Local0, IOMN)
|
||||
Store(Local0, IOMX)
|
||||
Local0 = READ (0, 0x24, 0xfe)
|
||||
Local0 <<= 2
|
||||
IOMN = Local0
|
||||
IOMX = Local0
|
||||
|
||||
/* Interrupt */
|
||||
Store(READ(0, 0x28, 0xf0), Local0)
|
||||
ShiftRight(Local0, 4, Local0)
|
||||
ShiftLeft(1, Local0, IRQ)
|
||||
Local0 = READ (0, 0x28, 0xf0)
|
||||
Local0 >>= 4
|
||||
IRQ = 1 << Local0
|
||||
Return(RSRC)
|
||||
}
|
||||
|
||||
|
@ -140,29 +140,29 @@ Device (SIO1)
|
|||
|
||||
WRIT(0, 0x24, 0)
|
||||
FindSetRightBit(IRQL, Local0)
|
||||
Decrement(Local0)
|
||||
ShiftLeft(Local0, 4, Local0)
|
||||
Local0--
|
||||
Local0 <<= 4
|
||||
|
||||
Store(READ(0, 0x28, 0x0f), Local1)
|
||||
Or(Local0, Local1, Local0)
|
||||
Local1 = READ (0, 0x28, 0x0f)
|
||||
Local0 |= Local1
|
||||
WRIT(0, 0x28, Local0)
|
||||
|
||||
Store(IOLO, Local0)
|
||||
ShiftRight(Local0, 2, Local0)
|
||||
And(Local0, 0xfe, Local0)
|
||||
Local0 = IOLO
|
||||
Local0 >>= 2
|
||||
Local0 &= 0xfe
|
||||
|
||||
Store(IOHI, Local1)
|
||||
ShiftLeft(Local1, 6, Local1)
|
||||
Or (Local0, Local1, Local0)
|
||||
Local1 = IOHI
|
||||
Local1 <<= 6
|
||||
Local0 |= Local1
|
||||
WRIT(0, 0x24, Local0)
|
||||
|
||||
Store(READ(0, 0x02, 0xff), Local0)
|
||||
Or(Local0, 0x08, Local0)
|
||||
Local0 = READ (0, 0x02, 0xff)
|
||||
Local0 |= 0x08
|
||||
WRIT(0, 0x02, Local0)
|
||||
|
||||
Store(READ(0, 0x07, 0xff), Local0)
|
||||
Not(0x40, Local1)
|
||||
And (Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x07, 0xff)
|
||||
Local1 = ~0x40
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x07, Local0)
|
||||
}
|
||||
|
||||
|
@ -170,22 +170,22 @@ Device (SIO1)
|
|||
/* D0 state - Line drivers are on */
|
||||
Method (_PS0, 0)
|
||||
{
|
||||
Store(READ(0, 0x02, 0xff), Local0)
|
||||
Or(Local0, 0x08, Local0)
|
||||
Local0 = READ (0, 0x02, 0xff)
|
||||
Local0 |= 0x08
|
||||
WRIT(0, 0x02, Local0)
|
||||
|
||||
Store (READ(0, 0x07, 0xff), Local0)
|
||||
Not(0x40, Local1)
|
||||
And(Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x07, 0xff)
|
||||
Local1 = ~0x40
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x07, Local0)
|
||||
}
|
||||
|
||||
/* D3 State - Line drivers are off */
|
||||
Method(_PS3, 0)
|
||||
{
|
||||
Store(READ(0, 0x02, 0xff), Local0)
|
||||
Not(0x08, Local1)
|
||||
And(Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x02, 0xff)
|
||||
Local1 = ~0x08
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x02, Local0)
|
||||
}
|
||||
}
|
||||
|
@ -200,24 +200,24 @@ Device (SIO1)
|
|||
Method (_STA, 0)
|
||||
{
|
||||
// Device disabled by coreboot?
|
||||
If (LEqual(CMBP, 0)) {
|
||||
If (CMBP == 0) {
|
||||
Return (0)
|
||||
}
|
||||
|
||||
/* IRDA? */
|
||||
Store(READ(0, 0x0c, 0x38), Local0)
|
||||
If (LNotEqual(Local0, Zero)) {
|
||||
Local0 = READ (0, 0x0c, 0x38)
|
||||
If (Local0 != 0) {
|
||||
Return (0)
|
||||
}
|
||||
|
||||
// Is the hardware enabled?
|
||||
Store (READ(0, 0x25, 0xff), Local0)
|
||||
If (LEqual(Local0, 0)) {
|
||||
Local0 = READ (0, 0x25, 0xff)
|
||||
If (Local0 == 0) {
|
||||
Return (0xd)
|
||||
} Else {
|
||||
// Power Enabled?
|
||||
Store (READ(0, 0x02, 0x80), Local0)
|
||||
If (LEqual(Local0, 0)) {
|
||||
Local0 = READ (0, 0x02, 0x80)
|
||||
If (Local0 == 0) {
|
||||
Return (0x0d)
|
||||
} Else {
|
||||
Return (0x0f)
|
||||
|
@ -230,12 +230,12 @@ Device (SIO1)
|
|||
{
|
||||
WRIT(0, 0x25, 0x00)
|
||||
|
||||
Store(READ(0, 0x28, 0xf0), Local0)
|
||||
Local0 = READ (0, 0x28, 0xf0)
|
||||
WRIT(0, 0x28, Local0)
|
||||
|
||||
Store(READ(0, 0x02, 0xff), Local0)
|
||||
Not(0x80, Local1)
|
||||
And(Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x02, 0xff)
|
||||
Local1 = ~0x80
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x02, Local0)
|
||||
}
|
||||
|
||||
|
@ -260,8 +260,8 @@ Device (SIO1)
|
|||
IRQNoFlags(_IRB) { 3 }
|
||||
})
|
||||
|
||||
And (_STA(), 0x02, Local0)
|
||||
If (LEqual(Local0, 0)) {
|
||||
Local0 = _STA() & 0x02
|
||||
If (Local0 == 0) {
|
||||
Return(NONE)
|
||||
}
|
||||
|
||||
|
@ -273,14 +273,14 @@ Device (SIO1)
|
|||
\_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQ)
|
||||
|
||||
/* I/O Base */
|
||||
Store (READ(0, 0x25, 0xfe), Local0)
|
||||
ShiftLeft(Local0, 0x02, Local0)
|
||||
Store(Local0, IOMN)
|
||||
Store(Local0, IOMX)
|
||||
Local0 = READ (0, 0x25, 0xfe)
|
||||
Local0 <<= 2
|
||||
IOMN = Local0
|
||||
IOMX = Local0
|
||||
|
||||
/* Interrupt */
|
||||
Store(READ(0, 0x28, 0x0f), Local0)
|
||||
ShiftLeft(1, Local0, IRQ)
|
||||
Local0 = READ (0, 0x28, 0x0f)
|
||||
IRQ = 1 << Local0
|
||||
Return(RSRC)
|
||||
}
|
||||
|
||||
|
@ -293,55 +293,55 @@ Device (SIO1)
|
|||
|
||||
WRIT(0, 0x25, 0)
|
||||
FindSetRightBit(IRQL, Local0)
|
||||
Decrement(Local0)
|
||||
Local0--
|
||||
|
||||
Store(READ(0, 0x28, 0xf0), Local1)
|
||||
Or(Local0, Local1, Local0)
|
||||
Local1 = READ (0, 0x28, 0xf0)
|
||||
Local0 |= Local1
|
||||
WRIT(0, 0x28, Local0)
|
||||
|
||||
Store(IOLO, Local0)
|
||||
ShiftRight(Local0, 2, Local0)
|
||||
And(Local0, 0xfe, Local0)
|
||||
Local0 = IOLO
|
||||
Local0 >>= 2
|
||||
Local0 &= 0xfe
|
||||
|
||||
Store(IOHI, Local1)
|
||||
ShiftLeft(Local1, 6, Local1)
|
||||
Or (Local0, Local1, Local0)
|
||||
Local1 = IOHI
|
||||
Local1 <<= 6
|
||||
Local0 |= Local1
|
||||
WRIT(0, 0x25, Local0)
|
||||
|
||||
Store(READ(0, 0x0c, 0xff), Local0)
|
||||
Not(0x38, Local1)
|
||||
And(Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x0c, 0xff)
|
||||
Local1 = ~0x38
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x0c, Local0)
|
||||
|
||||
Store(READ(0, 0x02, 0xff), Local0)
|
||||
Or(Local0, 0x80, Local0)
|
||||
Local0 = READ (0, 0x02, 0xff)
|
||||
Local0 |= 0x80
|
||||
WRIT(0, 0x02, Local0)
|
||||
|
||||
Store(READ(0, 0x07, 0xff), Local0)
|
||||
Not(0x20, Local1)
|
||||
And (Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x07, 0xff)
|
||||
Local1 = ~0x20
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x07, Local0)
|
||||
}
|
||||
|
||||
/* D0 state - Line drivers are on */
|
||||
Method (_PS0, 0)
|
||||
{
|
||||
Store(READ(0, 0x02, 0xff), Local0)
|
||||
Or(Local0, 0x80, Local0)
|
||||
Local0 = READ (0, 0x02, 0xff)
|
||||
Local0 |= 0x80
|
||||
WRIT(0, 0x02, Local0)
|
||||
|
||||
Store (READ(0, 0x07, 0xff), Local0)
|
||||
Not(0x20, Local1)
|
||||
And(Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x07, 0xff)
|
||||
Local1 = ~0x20
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x07, Local0)
|
||||
}
|
||||
|
||||
/* D3 State - Line drivers are off */
|
||||
Method(_PS3, 0)
|
||||
{
|
||||
Store(READ(0, 0x02, 0xff), Local0)
|
||||
Not(0x80, Local1)
|
||||
And(Local0, Local1, Local0)
|
||||
Local0 = READ (0, 0x02, 0xff)
|
||||
Local1 = ~0x80
|
||||
Local0 &= Local1
|
||||
WRIT(0, 0x02, Local0)
|
||||
}
|
||||
}
|
||||
|
|
|
@ -29,7 +29,7 @@ Scope (\_TZ)
|
|||
// Critical shutdown temperature
|
||||
Method (_CRT, 0, Serialized)
|
||||
{
|
||||
Return (Add (0x0aac, 0x50)) // FIXME
|
||||
Return (0x0aac + 0x50) // FIXME
|
||||
}
|
||||
|
||||
// CPU throttling start temperature
|
||||
|
|
Loading…
Reference in New Issue