mb/roda/rk886ex: Convert *.asl to ASL 2.0 syntax

Generated 'build/dsdt.dsl' files are identical.

Change-Id: I2eea24db6cfd260e0f36243e90a5e01b360f23fb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2020-10-04 14:57:37 +02:00 committed by Patrick Georgi
parent 527690c7bf
commit 62a437dd88
5 changed files with 206 additions and 206 deletions

View File

@ -69,76 +69,76 @@ Device (BAT1)
/* Update Battery Info */
Method(UPBI, 0)
{
Store (0x78, Index(PBIF, 1))
Store (0x64, Index(PBIF, 2))
Store (0x2b5c, Index(PBIF, 4))
Store ("Bat1", Index(PBIF, 9))
Store ("001", Index(PBIF, 10))
Store ("LION", Index(PBIF, 11))
Store ("Panasonic", Index(PBIF, 12))
PBIF [1] = 0x78
PBIF [2] = 0x64
PBIF [4] = 0x2b5c
PBIF [9] = "Bat1"
PBIF [10] = "001"
PBIF [11] = "LION"
PBIF [12] = "Panasonic"
}
Method(UPBS, 0)
{
Store(\_SB.PCI0.LPCB.EC0.QEVT, Local0)
If (Not(Local0)) {
Store(0, GP38)
Local0 = \_SB.PCI0.LPCB.EC0.QEVT
If (~Local0) {
GP38 = 0
Sleep(0x64)
Store(GP38, Local0)
If (Not(Local0)) {
Store (RDW(0x0d), Local0)
If (LNotEqual(Local0, 0xeeee)) {
If (LLessEqual(Local0, 0x64)) {
Store(Local0, CBA1)
Local0 = GP38
If (~Local0) {
Local0 = RDW (0x0d)
If (Local0 != 0xeeee) {
If (Local0 <= 0x64) {
CBA1 = Local0
}
}
}
}
Store (CBA1, Local0)
Store (Local0, Index(PBST, 2))
Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
Store (0, Local1)
Local0 = CBA1
PBST [2] = Local0
PBST [3] = DerefOf (PBIF [4])
Local1 = 0
If (PWRS) {
If (LLess(Local0, 0x64)) {
Store (2, Local1)
If (Local0 < 0x64) {
Local1 = 2
}
} Else {
If (LLessEqual(Local0, 0x5)) {
Store (4, Local1)
If (Local0 <= 0x5) {
Local1 = 4
} Else {
Store (1, Local1)
Local1 = 1
}
}
Store (Local1, Index(PBST, 0))
PBST [0] = Local1
If (\_SB.PCI0.LPCB.EC0.P63S) {
Store (0x16, Index(PBST, 1))
PBST [1] = 0x16
} Else {
Store (0x0b, Index(PBST, 1))
PBST [1] = 0x0b
}
}
// Invalidate Battery Info
Method(IVBI, 0)
{
Store (0xffffffff, Index(PBIF, 1))
Store (0xffffffff, Index(PBIF, 2))
Store (0xffffffff, Index(PBIF, 4))
Store ("Bad", Index(PBIF, 9))
Store ("Bad", Index(PBIF, 10))
Store ("Bad", Index(PBIF, 11))
Store ("Bad", Index(PBIF, 12))
Store (1, Index(PBIF, 0))
PBIF [1] = 0xffffffff
PBIF [2] = 0xffffffff
PBIF [4] = 0xffffffff
PBIF [9] = "Bad"
PBIF [10] = "Bad"
PBIF [11] = "Bad"
PBIF [12] = "Bad"
PBIF [0] = 1
}
Method(IVBS, 0)
{
Store (0x0, Index(PBST, 0))
Store (0xffffffff, Index(PBST, 1))
Store (0xffffffff, Index(PBST, 2))
Store (0xffffffff, Index(PBST, 3))
PBST [0] = 0
PBST [1] = 0xffffffff
PBST [2] = 0xffffffff
PBST [3] = 0xffffffff
}
}
@ -209,85 +209,85 @@ Device (BAT2)
/* Update Battery Info */
Method(UPBI, 0)
{
Store (0x78, Index(PBIF, 1))
Store (0x64, Index(PBIF, 2))
Store (0x2b5c, Index(PBIF, 4))
Store ("Bat2", Index(PBIF, 9))
Store ("002", Index(PBIF, 10))
Store ("LION", Index(PBIF, 11))
Store ("Panasonic", Index(PBIF, 12))
PBIF [1] = 0x78
PBIF [2] = 0x64
PBIF [4] = 0x2b5c
PBIF [9] = "Bat2"
PBIF [10] = "002"
PBIF [11] = "LION"
PBIF [12] = "Panasonic"
}
Method(UPBS, 0)
{
Store(\_SB.PCI0.LPCB.EC0.QEVT, Local0)
If (Not(Local0)) {
Store(0, GP38)
Local0 = \_SB.PCI0.LPCB.EC0.QEVT
If (~Local0) {
GP38 = 0
Sleep(0x64)
Store(GP38, Local0)
If (Not(Local0)) {
Store (RDW(0x0d), Local0)
If (LNotEqual(Local0, 0xeeee)) {
If (LLessEqual(Local0, 0x64)) {
Store(Local0, CBA2)
Local0 = GP38
If (~Local0) {
Local0 = RDW (0x0d)
If (Local0 != 0xeeee) {
If (Local0 <= 0x64) {
CBA2 = Local0
}
}
}
}
Store (CBA2, Local0)
Store (Local0, Index(PBST, 2))
Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
Store (0, Local1)
Local0 = CBA2
PBST [2] = Local0
PBST [3] = DerefOf (PBIF [4])
Local1 = 0
If (PWRS) {
If (LLess(Local0, 0x64)) {
Store (2, Local1)
If (Local0 < 0x64) {
Local1 = 2
}
} Else {
If (LLessEqual(Local0, 0x5)) {
Store (4, Local1)
If (Local0 <= 0x5) {
Local1 = 4
} Else {
Store (1, Local1)
Local1 = 1
}
}
Store (Local1, Index(PBST, 0))
PBST [0] = Local1
If (\_SB.PCI0.LPCB.EC0.P62S) {
Store (0x16, Index(PBST, 1))
PBST [1] = 0x16
} Else {
Store (0x0b, Index(PBST, 1))
PBST [1] = 0x0b
}
}
// Invalidate Battery Info
Method(IVBI, 0)
{
Store (0xffffffff, Index(PBIF, 1))
Store (0xffffffff, Index(PBIF, 2))
Store (0xffffffff, Index(PBIF, 4))
Store ("Bad", Index(PBIF, 9))
Store ("Bad", Index(PBIF, 10))
Store ("Bad", Index(PBIF, 11))
Store ("Bad", Index(PBIF, 12))
Store (1, Index(PBIF, 0))
PBIF [1] = 0xffffffff
PBIF [2] = 0xffffffff
PBIF [4] = 0xffffffff
PBIF [9] = "Bad"
PBIF [10] = "Bad"
PBIF [11] = "Bad"
PBIF [12] = "Bad"
PBIF [0] = 1
}
Method(IVBS, 0)
{
Store (0x0, Index(PBST, 0))
Store (0xffffffff, Index(PBST, 1))
Store (0xffffffff, Index(PBST, 2))
Store (0xffffffff, Index(PBST, 3))
PBST [0] = 0
PBST [1] = 0xffffffff
PBST [2] = 0xffffffff
PBST [3] = 0xffffffff
}
}
Method (RDW, 1)
{
Store (0x16, \_SB.PCI0.LPCB.EC0.SMAD)
Store (Arg0, \_SB.PCI0.LPCB.EC0.SMCM)
Store (0x09, \_SB.PCI0.LPCB.EC0.SMPR)
While (LNotEqual(\_SB.PCI0.LPCB.EC0.SMPR, 0x00)) {
\_SB.PCI0.LPCB.EC0.SMAD = 0x16
\_SB.PCI0.LPCB.EC0.SMCM = Arg0
\_SB.PCI0.LPCB.EC0.SMPR = 0x09
While (\_SB.PCI0.LPCB.EC0.SMPR != 0x00) {
Stall (1)
}
@ -300,11 +300,11 @@ Device (ADP1)
Method (_PSR, 0)
{
If (\_SB.PCI0.LPCB.EC0.ECON) {
Store (\_SB.PCI0.LPCB.EC0.P60S, Local0)
Local0 = \_SB.PCI0.LPCB.EC0.P60S
If (Local0) {
Store (0, PWRS)
PWRS = 0
} Else {
Store (1, PWRS)
PWRS = 1
}
}

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@ -63,8 +63,8 @@ Device(EC0)
// This method is needed by Windows XP/2000 for
// EC initialization before a driver is loaded
If (LEqual(Arg0, 0x03)) {
Store (Arg1, ECON)
If (Arg0 == 0x03) {
ECON = Arg1
}
}
@ -72,20 +72,20 @@ Device(EC0)
Method (_Q11, 0)
{
Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug)
Debug = "_Q11: Fn-F8 (Sleep Button) pressed"
Notify(SLPB, 0x80)
}
Method (_Q12, 0)
{
Store("_Q12: Fn-F9 (Display Switch) pressed", Debug)
Debug = "_Q12: Fn-F9 (Display Switch) pressed"
Notify (\_SB.PCI0.GFX0, 0x82)
// Store(1, TLST)
// TLST = 1
}
Method (_Q30, 0)
{
Store("_Q30: AC In/Out", Debug)
Debug = "_Q30: AC In/Out"
Notify(ADP1, 0x80) // Tell the Power Adapter
PNOT() // and the CPU and Battery
// Notify the Batteries
@ -95,16 +95,16 @@ Device(EC0)
Method (_Q31, 0)
{
Store("_Q31: LID Open/Close", Debug)
Debug = "_Q31: LID Open/Close"
Notify(LID0, 0x80)
}
Method (_Q32, 0)
{
Store("_Q32: Battery 1 In/Out", Debug)
Debug = "_Q32: Battery 1 In/Out"
If (ECON) {
Store (P62S, Local0)
If (Not(Local0)) {
Local0 = P62S
If (~Local0) {
Notify(BAT1, 0x80)
}
}
@ -112,10 +112,10 @@ Device(EC0)
Method (_Q33, 0)
{
Store("_Q33: Battery 2 In/Out", Debug)
Debug = "_Q33: Battery 2 In/Out"
If (ECON) {
Store (P63S, Local0)
If (Not(Local0)) {
Local0 = P63S
If (~Local0) {
Notify(BAT2, 0x80)
}
}
@ -123,33 +123,33 @@ Device(EC0)
Method (_Q34, 0)
{
Store("_Q34: LPT/FDD", Debug)
Debug = "_Q34: LPT/FDD"
// PHSS(0x70)
}
Method (_Q35, 0)
{
Store("_Q35: Processor is hot", Debug)
Debug = "_Q35: Processor is hot"
}
Method (_Q36, 0)
{
Store("_Q36: Thermal Warning", Debug)
Debug = "_Q36: Thermal Warning"
}
Method (_Q37, 0)
{
Store("_Q37: PME", Debug)
Debug = "_Q37: PME"
}
Method (_Q38, 0)
{
Store("_Q38: Thermal", Debug)
Debug = "_Q38: Thermal"
}
Method (_Q39, 0)
{
Store("_Q39: Thermal", Debug)
Debug = "_Q39: Thermal"
}
// TODO Scope _SB devices for AC power, LID, Power button

View File

@ -20,12 +20,12 @@ Method(_WAK,1)
// was inserted while a sleep state was active.
// Are we going to S3?
If (LEqual(Arg0, 3)) {
If (Arg0 == 3) {
// ..
}
// Are we going to S4?
If (LEqual(Arg0, 4)) {
If (Arg0 == 4) {
// ..
}
@ -56,7 +56,7 @@ Scope(\_SB)
* running: Windows XP SP1 needs to have C-State coordination
* enabled in SMM.
*/
If (LAnd(LEqual(OSYS, 2001), MPEN)) {
If ((OSYS == 2001) && MPEN) {
// TRAP(61) // TODO
}

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@ -19,13 +19,13 @@ Device (SIO1)
Method (READ, 3)
{
Acquire (SIOM, 0xffff)
If (LEqual(Arg0, 0)) {
Store (0x55, INDX)
Store (Arg1, INDX)
Store (DATA, Local1)
Store (0xaa, INDX)
If (Arg0 == 0) {
INDX = 0x55
INDX = Arg1
Local1 = DATA
INDX = 0xaa
}
And (Local1, Arg2, Local1)
Local1 &= Arg2
Release(SIOM)
Return(Local1)
}
@ -33,11 +33,11 @@ Device (SIO1)
Method (WRIT, 3)
{
Acquire (SIOM, 0xffff)
If (LEqual(Arg0, 0)) {
Store (0x55, INDX)
Store (Arg1, INDX)
Store (Arg2, DATA)
Store (0xaa, INDX)
If (Arg0 == 0) {
INDX = 0x55
INDX = Arg1
DATA = Arg2
INDX = 0xaa
}
Release(SIOM)
}
@ -52,18 +52,18 @@ Device (SIO1)
Method (_STA, 0)
{
// Device disabled by coreboot?
If (LEqual(CMAP, 0)) {
If (CMAP == 0) {
Return (0)
}
// Is the hardware enabled?
Store (READ(0, 0x24, 0xff), Local0)
If (LEqual(Local0, 0)) {
Local0 = READ (0, 0x24, 0xff)
If (Local0 == 0) {
Return (0xd)
} Else {
// Power Enabled?
Store (READ(0, 0x02, 0x08), Local0)
If (LEqual(Local0, 0)) {
Local0 = READ (0, 0x02, 0x08)
If (Local0 == 0) {
Return (0x0d)
} Else {
Return (0x0f)
@ -76,12 +76,12 @@ Device (SIO1)
{
WRIT(0, 0x24, 0x00)
Store(READ(0, 0x28, 0x0f), Local0)
Local0 = READ (0, 0x28, 0x0f)
WRIT(0, 0x28, Local0)
Store(READ(0, 0x02, 0xff), Local0)
Not(0x08, Local1)
And(Local0, Local1, Local0)
Local0 = READ (0, 0x02, 0xff)
Local1 = ~0x08
Local0 &= Local1
WRIT(0, 0x02, Local0)
}
@ -106,8 +106,8 @@ Device (SIO1)
IRQNoFlags(_IRA) { 4 }
})
And (_STA(), 0x02, Local0)
If (LEqual(Local0, 0)) {
Local0 = _STA() & 0x02
If (Local0 == 0) {
Return(NONE)
}
@ -119,15 +119,15 @@ Device (SIO1)
\_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQ)
/* I/O Base */
Store (READ(0, 0x24, 0xfe), Local0)
ShiftLeft(Local0, 0x02, Local0)
Store(Local0, IOMN)
Store(Local0, IOMX)
Local0 = READ (0, 0x24, 0xfe)
Local0 <<= 2
IOMN = Local0
IOMX = Local0
/* Interrupt */
Store(READ(0, 0x28, 0xf0), Local0)
ShiftRight(Local0, 4, Local0)
ShiftLeft(1, Local0, IRQ)
Local0 = READ (0, 0x28, 0xf0)
Local0 >>= 4
IRQ = 1 << Local0
Return(RSRC)
}
@ -140,29 +140,29 @@ Device (SIO1)
WRIT(0, 0x24, 0)
FindSetRightBit(IRQL, Local0)
Decrement(Local0)
ShiftLeft(Local0, 4, Local0)
Local0--
Local0 <<= 4
Store(READ(0, 0x28, 0x0f), Local1)
Or(Local0, Local1, Local0)
Local1 = READ (0, 0x28, 0x0f)
Local0 |= Local1
WRIT(0, 0x28, Local0)
Store(IOLO, Local0)
ShiftRight(Local0, 2, Local0)
And(Local0, 0xfe, Local0)
Local0 = IOLO
Local0 >>= 2
Local0 &= 0xfe
Store(IOHI, Local1)
ShiftLeft(Local1, 6, Local1)
Or (Local0, Local1, Local0)
Local1 = IOHI
Local1 <<= 6
Local0 |= Local1
WRIT(0, 0x24, Local0)
Store(READ(0, 0x02, 0xff), Local0)
Or(Local0, 0x08, Local0)
Local0 = READ (0, 0x02, 0xff)
Local0 |= 0x08
WRIT(0, 0x02, Local0)
Store(READ(0, 0x07, 0xff), Local0)
Not(0x40, Local1)
And (Local0, Local1, Local0)
Local0 = READ (0, 0x07, 0xff)
Local1 = ~0x40
Local0 &= Local1
WRIT(0, 0x07, Local0)
}
@ -170,22 +170,22 @@ Device (SIO1)
/* D0 state - Line drivers are on */
Method (_PS0, 0)
{
Store(READ(0, 0x02, 0xff), Local0)
Or(Local0, 0x08, Local0)
Local0 = READ (0, 0x02, 0xff)
Local0 |= 0x08
WRIT(0, 0x02, Local0)
Store (READ(0, 0x07, 0xff), Local0)
Not(0x40, Local1)
And(Local0, Local1, Local0)
Local0 = READ (0, 0x07, 0xff)
Local1 = ~0x40
Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D3 State - Line drivers are off */
Method(_PS3, 0)
{
Store(READ(0, 0x02, 0xff), Local0)
Not(0x08, Local1)
And(Local0, Local1, Local0)
Local0 = READ (0, 0x02, 0xff)
Local1 = ~0x08
Local0 &= Local1
WRIT(0, 0x02, Local0)
}
}
@ -200,24 +200,24 @@ Device (SIO1)
Method (_STA, 0)
{
// Device disabled by coreboot?
If (LEqual(CMBP, 0)) {
If (CMBP == 0) {
Return (0)
}
/* IRDA? */
Store(READ(0, 0x0c, 0x38), Local0)
If (LNotEqual(Local0, Zero)) {
Local0 = READ (0, 0x0c, 0x38)
If (Local0 != 0) {
Return (0)
}
// Is the hardware enabled?
Store (READ(0, 0x25, 0xff), Local0)
If (LEqual(Local0, 0)) {
Local0 = READ (0, 0x25, 0xff)
If (Local0 == 0) {
Return (0xd)
} Else {
// Power Enabled?
Store (READ(0, 0x02, 0x80), Local0)
If (LEqual(Local0, 0)) {
Local0 = READ (0, 0x02, 0x80)
If (Local0 == 0) {
Return (0x0d)
} Else {
Return (0x0f)
@ -230,12 +230,12 @@ Device (SIO1)
{
WRIT(0, 0x25, 0x00)
Store(READ(0, 0x28, 0xf0), Local0)
Local0 = READ (0, 0x28, 0xf0)
WRIT(0, 0x28, Local0)
Store(READ(0, 0x02, 0xff), Local0)
Not(0x80, Local1)
And(Local0, Local1, Local0)
Local0 = READ (0, 0x02, 0xff)
Local1 = ~0x80
Local0 &= Local1
WRIT(0, 0x02, Local0)
}
@ -260,8 +260,8 @@ Device (SIO1)
IRQNoFlags(_IRB) { 3 }
})
And (_STA(), 0x02, Local0)
If (LEqual(Local0, 0)) {
Local0 = _STA() & 0x02
If (Local0 == 0) {
Return(NONE)
}
@ -273,14 +273,14 @@ Device (SIO1)
\_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQ)
/* I/O Base */
Store (READ(0, 0x25, 0xfe), Local0)
ShiftLeft(Local0, 0x02, Local0)
Store(Local0, IOMN)
Store(Local0, IOMX)
Local0 = READ (0, 0x25, 0xfe)
Local0 <<= 2
IOMN = Local0
IOMX = Local0
/* Interrupt */
Store(READ(0, 0x28, 0x0f), Local0)
ShiftLeft(1, Local0, IRQ)
Local0 = READ (0, 0x28, 0x0f)
IRQ = 1 << Local0
Return(RSRC)
}
@ -293,55 +293,55 @@ Device (SIO1)
WRIT(0, 0x25, 0)
FindSetRightBit(IRQL, Local0)
Decrement(Local0)
Local0--
Store(READ(0, 0x28, 0xf0), Local1)
Or(Local0, Local1, Local0)
Local1 = READ (0, 0x28, 0xf0)
Local0 |= Local1
WRIT(0, 0x28, Local0)
Store(IOLO, Local0)
ShiftRight(Local0, 2, Local0)
And(Local0, 0xfe, Local0)
Local0 = IOLO
Local0 >>= 2
Local0 &= 0xfe
Store(IOHI, Local1)
ShiftLeft(Local1, 6, Local1)
Or (Local0, Local1, Local0)
Local1 = IOHI
Local1 <<= 6
Local0 |= Local1
WRIT(0, 0x25, Local0)
Store(READ(0, 0x0c, 0xff), Local0)
Not(0x38, Local1)
And(Local0, Local1, Local0)
Local0 = READ (0, 0x0c, 0xff)
Local1 = ~0x38
Local0 &= Local1
WRIT(0, 0x0c, Local0)
Store(READ(0, 0x02, 0xff), Local0)
Or(Local0, 0x80, Local0)
Local0 = READ (0, 0x02, 0xff)
Local0 |= 0x80
WRIT(0, 0x02, Local0)
Store(READ(0, 0x07, 0xff), Local0)
Not(0x20, Local1)
And (Local0, Local1, Local0)
Local0 = READ (0, 0x07, 0xff)
Local1 = ~0x20
Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D0 state - Line drivers are on */
Method (_PS0, 0)
{
Store(READ(0, 0x02, 0xff), Local0)
Or(Local0, 0x80, Local0)
Local0 = READ (0, 0x02, 0xff)
Local0 |= 0x80
WRIT(0, 0x02, Local0)
Store (READ(0, 0x07, 0xff), Local0)
Not(0x20, Local1)
And(Local0, Local1, Local0)
Local0 = READ (0, 0x07, 0xff)
Local1 = ~0x20
Local0 &= Local1
WRIT(0, 0x07, Local0)
}
/* D3 State - Line drivers are off */
Method(_PS3, 0)
{
Store(READ(0, 0x02, 0xff), Local0)
Not(0x80, Local1)
And(Local0, Local1, Local0)
Local0 = READ (0, 0x02, 0xff)
Local1 = ~0x80
Local0 &= Local1
WRIT(0, 0x02, Local0)
}
}

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@ -29,7 +29,7 @@ Scope (\_TZ)
// Critical shutdown temperature
Method (_CRT, 0, Serialized)
{
Return (Add (0x0aac, 0x50)) // FIXME
Return (0x0aac + 0x50) // FIXME
}
// CPU throttling start temperature