lenovo: Handle EEPROM/RFID chip.
EEPROM/RFID chip present in thinkpad should be locked in a way to avoid any potential RFID access. Read serial number, UUID and P/N from EEPROM. This info is stored on AT24RF08 chip acessible through SMBUS. Change-Id: Ia3e766d90a094f63c8c854cd37e165221ccd8acd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4774 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
This commit is contained in:
Vladimir Serbinenko
Rudolf Marek
parent
5f20dbfbe3
commit
62adc4c610
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@ -7,3 +7,4 @@ subdirs-y += lm63
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subdirs-y += rtd2132
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subdirs-y += w83795
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subdirs-y += w83793
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subdirs-y += at24rf08c
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@ -0,0 +1,2 @@
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ramstage-$(CONFIG_VENDOR_LENOVO) += at24rf08c.c
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ramstage-$(CONFIG_VENDOR_LENOVO) += lenovo_serials.c
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@ -0,0 +1,74 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Vladimir Serbinenko
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <types.h>
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#include <string.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/smbus.h>
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#include <smbios.h>
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#include <console/console.h>
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static void at24rf08c_init(device_t dev)
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{
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int i, j;
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if (!dev->enabled)
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return;
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/* Ensure that EEPROM/RFID chip is not accessible through RFID.
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Need to do it only on 5c. */
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if (dev->path.type != DEVICE_PATH_I2C || dev->path.i2c.device != 0x5c)
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return;
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printk (BIOS_DEBUG, "Locking EEPROM RFID\n");
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for (i = 0; i < 8; i++)
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{
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/* After a register write AT24RF08C sometimes stops responding.
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Retry several times in case of failure.
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*/
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for (j = 0; j < 100; j++)
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if (smbus_write_byte(dev, i, 0x0f) >= 0)
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break;
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}
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printk (BIOS_DEBUG, "init EEPROM done\n");
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}
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static void at24rf08c_noop(device_t dummy)
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{
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}
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static struct device_operations at24rf08c_operations = {
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.read_resources = at24rf08c_noop,
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.set_resources = at24rf08c_noop,
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.enable_resources = at24rf08c_noop,
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.init = at24rf08c_init,
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};
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static void enable_dev(device_t dev)
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{
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dev->ops = &at24rf08c_operations;
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}
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struct chip_operations drivers_i2c_at24rf08c_ops = {
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CHIP_NAME("AT24RF08C")
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.enable_dev = enable_dev,
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};
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@ -0,0 +1,137 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Vladimir Serbinenko
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <types.h>
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#include <string.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/smbus.h>
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#include <smbios.h>
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#include <console/console.h>
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static void at24rf08c_read_string(u8 bank, u8 start, u8 len, char *result)
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{
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int i;
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device_t dev;
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dev = dev_find_slot_on_smbus(1, 0x54 | bank);
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if (dev == 0) {
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printk(BIOS_WARNING, "EEPROM not found\n");
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memcpy(result, "*INVALID*", sizeof ("*INVALID*"));
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return;
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}
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for (i = 0; i < len; i++) {
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int t;
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int j;
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/* After a register write AT24RF08C (which we issued in init function) sometimes stops responding.
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Retry several times in case of failure.
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*/
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for (j = 0; j < 100; j++) {
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t = smbus_read_byte(dev, start + i);
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if (t >= 0)
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break;
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}
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if (t < 0x20 || t > 0x7f) {
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memcpy(result, "*INVALID*", sizeof ("*INVALID*"));
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return;
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}
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result[i] = t;
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}
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}
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const char *smbios_mainboard_serial_number(void)
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{
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static char result[12];
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static int already_read;
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if (already_read)
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return result;
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memset(result, 0, sizeof (result));
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at24rf08c_read_string(0, 0x2e, 7, result);
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already_read = 1;
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return result;
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}
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const char *smbios_mainboard_product_name(void)
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{
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static char result[12];
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static int already_read;
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if (already_read)
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return result;
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memset (result, 0, sizeof (result));
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at24rf08c_read_string(0, 0x27, 7, result);
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already_read = 1;
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return result;
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}
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void smbios_mainboard_set_uuid(u8 *uuid)
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{
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static char result[16];
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unsigned i;
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static int already_read;
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device_t dev;
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const int remap[16] = {
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/* UUID byteswap. */
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3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11, 12, 13, 14, 15
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};
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if (already_read) {
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memcpy (uuid, result, 16);
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return;
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}
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memset (result, 0, sizeof (result));
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dev = dev_find_slot_on_smbus(1, 0x56);
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if (dev == 0) {
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printk(BIOS_WARNING, "eeprom not found\n");
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already_read = 1;
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memset (uuid, 0, 16);
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return;
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}
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for (i = 0; i < 16; i++) {
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int t;
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int j;
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/* After a register write AT24RF08C (which we issued in init function) sometimes stops responding.
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Retry several times in case of failure.
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*/
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for (j = 0; j < 100; j++) {
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t = smbus_read_byte(dev, 0x12 + i);
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if (t >= 0)
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break;
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}
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if (t < 0) {
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memset (result, 0, sizeof (result));
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break;
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}
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result[remap[i]] = t;
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}
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already_read = 1;
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memcpy (uuid, result, 16);
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}
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@ -213,6 +213,17 @@ chip northbridge/intel/i945
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register "reg11" = "0x07"
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device i2c 69 on end
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end
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# eeprom, 8 virtual devices, same chip
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chip drivers/i2c/at24rf08c
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device i2c 54 on end
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device i2c 55 on end
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device i2c 56 on end
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device i2c 57 on end
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device i2c 5c on end
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device i2c 5d on end
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device i2c 5e on end
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device i2c 5f on end
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end
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end
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end
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end
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@ -145,6 +145,17 @@ chip northbridge/intel/nehalem
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end
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device pci 1f.3 on # SMBUS
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subsystemid 0x17aa 0x2167
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# eeprom, 8 virtual devices, same chip
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chip drivers/i2c/at24rf08c
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device i2c 54 on end
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device i2c 55 on end
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device i2c 56 on end
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device i2c 57 on end
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device i2c 5c on end
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device i2c 5d on end
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device i2c 5e on end
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device i2c 5f on end
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end
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end
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end
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end
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@ -127,7 +127,19 @@ chip northbridge/intel/sandybridge
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end
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end # LPC bridge
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device pci 1f.2 on end # SATA Controller 1
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device pci 1f.3 on end # SMBus
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device pci 1f.3 on
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# eeprom, 8 virtual devices, same chip
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chip drivers/i2c/at24rf08c
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device i2c 54 on end
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device i2c 55 on end
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device i2c 56 on end
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device i2c 57 on end
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device i2c 5c on end
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device i2c 5d on end
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device i2c 5e on end
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device i2c 5f on end
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end
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end # SMBus
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device pci 1f.5 off end # SATA Controller 2
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device pci 1f.6 on end # Thermal
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end
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@ -190,7 +190,17 @@ chip northbridge/intel/i945
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register "reg11" = "0x07"
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device i2c 69 on end
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end
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# eeprom, 8 virtual devices, same chip
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chip drivers/i2c/at24rf08c
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device i2c 54 on end
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device i2c 55 on end
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device i2c 56 on end
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device i2c 57 on end
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device i2c 5c on end
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device i2c 5d on end
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device i2c 5e on end
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device i2c 5f on end
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end
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end
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end
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chip southbridge/ricoh/rl5c476
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