ChangeLog:
Add initial ACPI support for M57SLI. Activates/Enables: * native Coreboot ACPI for M57SLI * Soft-Power-Off * PowerNow! * High Precision Event Timer * Windows booting with ACPI support Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4364 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Harald Gutmann
parent
ecf4ef0b26
commit
62cfe169fa
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@ -163,6 +163,19 @@ end
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mainboardinit ./cache_as_ram_auto.inc
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end
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##
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## ACPI Support
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##
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if HAVE_ACPI_TABLES
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object acpi_tables.o
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makerule dsdt.c
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depends "$(MAINBOARD)/dsdt.asl"
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action "iasl -p $(PWD)/dsdt -tc $(MAINBOARD)/dsdt.asl"
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action "mv dsdt.hex dsdt.c"
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end
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object ./dsdt.o
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end
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##
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## Include the secondary Configuration files
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##
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@ -175,7 +175,7 @@ default HAVE_MP_TABLE=1
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default HAVE_HIGH_TABLES=1
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## ACPI tables will be included
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default HAVE_ACPI_TABLES=0
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default HAVE_ACPI_TABLES=1
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##
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## Build code to export a CMOS option table
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@ -0,0 +1,203 @@
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/*
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* This file is part of the coreboot project.
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*
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* Written by Stefan Reinauer <stepan@openbios.org>.
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* ACPI FADT, FACS, and DSDT table support added by
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*
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* Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
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* Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>
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* Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
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* Copyright (C) 2009 Harald Gutmann <harald.gutmann@gmx.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License v2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <string.h>
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#include <arch/acpi.h>
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#include <arch/smp/mpspec.h>
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#include <device/device.h>
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#include <device/pci_ids.h>
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#include <../../../northbridge/amd/amdk8/amdk8_acpi.h>
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#include <cpu/amd/model_fxx_powernow.h>
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#include <device/pci.h>
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#include <cpu/amd/amdk8_sysconf.h>
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extern unsigned char AmlCode[];
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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/* Not implemented */
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return current;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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unsigned int gsi_base = 0x18;
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extern unsigned char bus_mcp55[8];
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extern unsigned apicid_mcp55;
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extern void get_bus_conf(void);
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unsigned sbdn;
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struct resource *res;
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device_t dev;
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get_bus_conf();
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sbdn = sysconf.sbdn;
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/* Create all subtables for processors. */
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current = acpi_create_madt_lapics(current);
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/* Write SB IOAPIC. */
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dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_mcp55, res->base, 0);
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}
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}
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/* Write NB IOAPIC. */
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dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x12,1));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_mcp55++, res->base, gsi_base);
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}
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}
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/* IRQ9 ACPI active low. */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
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/* IRQ0 -> APIC IRQ2. */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 0, 2, 0x0);
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/* Create all subtables for processors. */
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current = acpi_create_madt_lapic_nmis(current,
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MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, 1);
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return current;
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}
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unsigned long acpi_fill_ssdt_generator(unsigned long current, char *oem_table_id)
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{
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k8acpi_write_vars();
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amd_model_fxx_generate_powernow(0, 0, 0);
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return (unsigned long) (acpigen_get_current());
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}
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unsigned long write_acpi_tables(unsigned long start)
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{
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unsigned long current;
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acpi_rsdp_t *rsdp;
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acpi_srat_t *srat;
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acpi_rsdt_t *rsdt;
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acpi_mcfg_t *mcfg;
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acpi_hpet_t *hpet;
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acpi_madt_t *madt;
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acpi_fadt_t *fadt;
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acpi_facs_t *facs;
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acpi_slit_t *slit;
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acpi_header_t *ssdt;
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acpi_header_t *dsdt;
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/* Align ACPI tables to 16 byte. */
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start = (start + 0x0f) & -0x10;
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current = start;
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printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
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/* We need at least an RSDP and an RSDT table. */
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rsdp = (acpi_rsdp_t *) current;
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current += sizeof(acpi_rsdp_t);
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rsdt = (acpi_rsdt_t *) current;
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current += sizeof(acpi_rsdt_t);
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/* Clear all table memory. */
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memset((void *) start, 0, current - start);
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acpi_write_rsdp(rsdp, rsdt);
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acpi_write_rsdt(rsdt);
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/* We explicitly add these tables later on: */
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printk_debug("ACPI: * FACS\n");
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/* we should align FACS to 64B as per ACPI specs */
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current = ALIGN(current, 64);
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facs = (acpi_facs_t *) current;
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current += sizeof(acpi_facs_t);
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acpi_create_facs(facs);
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dsdt = (acpi_header_t *) current;
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current += ((acpi_header_t *) AmlCode)->length;
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memcpy((void *) dsdt, (void *) AmlCode,
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((acpi_header_t *) AmlCode)->length);
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dsdt->checksum = 0; /* Don't trust iasl to get this right. */
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dsdt->checksum = acpi_checksum(dsdt, dsdt->length);
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printk_debug("ACPI: * DSDT @ %08x Length %x\n", dsdt,
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dsdt->length);
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printk_debug("ACPI: * FADT\n");
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fadt = (acpi_fadt_t *) current;
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current += sizeof(acpi_fadt_t);
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acpi_create_fadt(fadt, facs, dsdt);
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acpi_add_table(rsdt, fadt);
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printk_debug("ACPI: * HPET\n");
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hpet = (acpi_hpet_t *) current;
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current += sizeof(acpi_hpet_t);
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acpi_create_hpet(hpet);
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acpi_add_table(rsdt, hpet);
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/* If we want to use HPET timers Linux wants an MADT. */
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printk_debug("ACPI: * MADT\n");
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madt = (acpi_madt_t *) current;
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acpi_create_madt(madt);
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current += madt->header.length;
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acpi_add_table(rsdt, madt);
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printk_debug("ACPI: * MCFG\n");
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mcfg = (acpi_mcfg_t *) current;
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acpi_create_mcfg(mcfg);
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current += mcfg->header.length;
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acpi_add_table(rsdt, mcfg);
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printk_debug("ACPI: * SRAT\n");
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srat = (acpi_srat_t *) current;
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acpi_create_srat(srat);
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current += srat->header.length;
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acpi_add_table(rsdt, srat);
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/* SLIT */
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printk_debug("ACPI: * SLIT\n");
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slit = (acpi_slit_t *) current;
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acpi_create_slit(slit);
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current+=slit->header.length;
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acpi_add_table(rsdt,slit);
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/* SSDT */
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printk_debug("ACPI: * SSDT\n");
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ssdt = (acpi_header_t *)current;
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acpi_create_ssdt_generator(ssdt, "DYNADATA");
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current += ssdt->length;
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acpi_add_table(rsdt, ssdt);
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printk_info("ACPI: done.\n");
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return current;
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}
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@ -0,0 +1,266 @@
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/*
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* This file is part of the coreboot project.
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*
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* (C) Copyright 2004 Nick Barker <Nick.Barker9@btinternet.com>
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* (C) Copyright 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
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* (C) Copyright 2009 Harald Gutmann <harald.gutmann@gmx.net>
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*
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* ISA portions taken from QEMU acpi-dsdt.dsl.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License v2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
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{
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Include ("../../../../src/northbridge/amd/amdk8/amdk8_util.asl")
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/* For now only define 2 power states:
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* - S0 which is fully on
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* - S5 which is soft off
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*/
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Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S5, Package () { 0x07, 0x00, 0x00, 0x00 })
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/* Root of the bus hierarchy */
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Scope (\_SB)
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{
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/* Top PCI device */
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Device (PCI0)
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{
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Name (_HID, EisaId ("PNP0A03"))
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Name (_ADR, 0x00)
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Name (_UID, 0x00)
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Name (_BBN, 0x00)
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External (BUSN)
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External (MMIO)
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External (PCIO)
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External (SBLK)
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External (TOM1)
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External (HCLK)
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External (SBDN)
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External (HCDN)
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Method (_CRS, 0, NotSerialized)
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{
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Name (BUF0, ResourceTemplate ()
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{
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IO (Decode16,
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0x0CF8, // Address Range Minimum
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0x0CF8, // Address Range Maximum
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0x01, // Address Alignment
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0x08, // Address Length
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)
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WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, // Address Space Granularity
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0x0000, // Address Range Minimum
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0x0CF7, // Address Range Maximum
|
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0x0000, // Address Translation Offset
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0x0CF8, // Address Length
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,, , TypeStatic)
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})
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/* Methods bellow use SSDT to get actual MMIO regs
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The IO ports are from 0xd00, optionally an VGA,
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otherwise the info from MMIO is used.
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*/
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Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
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Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
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Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
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Return (Local3)
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}
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|
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/* PCI Routing Table */
|
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Name (_PRT, Package () {
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Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x0A }, /* 0x1 - 00:01.1 - IRQ 10 - SMBus */
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Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x16 }, /* 0x2 - 00:02.0 - IRQ 22 - USB */
|
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Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x17 }, /* 0x2 - 00:01.1 - IRQ 23 - USB */
|
||||
Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x15 }, /* 0x4 - 00:04.0 - IRQ 21 - IDE */
|
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Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x14 }, /* 0x5 - 00:05.0 - IRQ 20 - SATA */
|
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Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x15 }, /* 0x5 - 00:05.1 - IRQ 21 - SATA */
|
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Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x16 }, /* 0x5 - 00:05.2 - IRQ 22 - SATA */
|
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Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x17 }, /* 0x6 - 00:06.1 - IRQ 23 - HD Audio */
|
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Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x14 }, /* 0x8 - 00:08.0 - IRQ 20 - GBit Ethernet */
|
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})
|
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|
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Device (PEBF) /* PCI-E Bridge F */
|
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{
|
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Name (_ADR, 0x000F0000)
|
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Name (_UID, 0x00)
|
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Name (_BBN, 0x07)
|
||||
Name (_PRT, Package () {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
|
||||
})
|
||||
}
|
||||
|
||||
Device (PEBE) /* PCI-E Bridge E */
|
||||
{
|
||||
Name (_ADR, 0x000E0000)
|
||||
Name (_UID, 0x00)
|
||||
Name (_BBN, 0x06)
|
||||
Name (_PRT, Package () {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x11 },
|
||||
})
|
||||
}
|
||||
|
||||
Device (PEBD) /* PCI-E Bridge D */
|
||||
{
|
||||
Name (_ADR, 0x000D0000)
|
||||
Name (_UID, 0x00)
|
||||
Name (_BBN, 0x05)
|
||||
Name (_PRT, Package () {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x12 },
|
||||
})
|
||||
}
|
||||
|
||||
Device (PEBC) /* PCI-E Bridge C */
|
||||
{
|
||||
Name (_ADR, 0x000C0000)
|
||||
Name (_UID, 0x00)
|
||||
Name (_BBN, 0x04)
|
||||
Name (_PRT, Package () {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 },
|
||||
})
|
||||
}
|
||||
|
||||
Device (PEBB) /* PCI-E Bridge B */
|
||||
{
|
||||
Name (_ADR, 0x000B0000)
|
||||
Name (_UID, 0x00)
|
||||
Name (_BBN, 0x03)
|
||||
Name (_PRT, Package () {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x10 },
|
||||
})
|
||||
}
|
||||
|
||||
Device (PEBA) /* PCI-E Bridge A */
|
||||
{
|
||||
Name (_ADR, 0x000A0000)
|
||||
Name (_UID, 0x00)
|
||||
Name (_BBN, 0x02)
|
||||
Name (_PRT, Package () {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x11 },
|
||||
})
|
||||
}
|
||||
|
||||
Device (PCID) /* PCI Device */
|
||||
{
|
||||
Name (_ADR, 0x00060000)
|
||||
Name (_UID, 0x00)
|
||||
Name (_BBN, 0x01)
|
||||
Name (_PRT, Package () {
|
||||
Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x13 }, /* PCI slot 1 */
|
||||
Package (0x04) { 0x0007FFFF, 0x01, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0007FFFF, 0x02, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0007FFFF, 0x03, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x10 }, /* PCI slot 2 */
|
||||
Package (0x04) { 0x0008FFFF, 0x01, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0008FFFF, 0x02, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0008FFFF, 0x03, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0009FFFF, 0x00, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0009FFFF, 0x01, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0009FFFF, 0x02, 0x00, 0x13 },
|
||||
Package (0x04) { 0x0009FFFF, 0x03, 0x00, 0x10 },
|
||||
Package (0x04) { 0x000AFFFF, 0x00, 0x00, 0x12 }, /* FireWire */
|
||||
Package (0x04) { 0x000AFFFF, 0x01, 0x00, 0x13 },
|
||||
Package (0x04) { 0x000AFFFF, 0x02, 0x00, 0x10 },
|
||||
Package (0x04) { 0x000AFFFF, 0x03, 0x00, 0x11 },
|
||||
})
|
||||
}
|
||||
}
|
||||
|
||||
Device (ISA) {
|
||||
Name (_ADR, 0x000010000)
|
||||
|
||||
/* PS/2 keyboard (seems to be important for WinXP install) */
|
||||
Device (KBD)
|
||||
{
|
||||
Name (_HID, EisaId ("PNP0303"))
|
||||
Method (_STA, 0, NotSerialized)
|
||||
{
|
||||
Return (0x0f)
|
||||
}
|
||||
Method (_CRS, 0, NotSerialized)
|
||||
{
|
||||
Name (TMP, ResourceTemplate () {
|
||||
IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
|
||||
IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
|
||||
IRQNoFlags () {1}
|
||||
})
|
||||
Return (TMP)
|
||||
}
|
||||
}
|
||||
|
||||
/* PS/2 mouse */
|
||||
Device (MOU)
|
||||
{
|
||||
Name (_HID, EisaId ("PNP0F13"))
|
||||
Method (_STA, 0, NotSerialized)
|
||||
{
|
||||
Return (0x0f)
|
||||
}
|
||||
Method (_CRS, 0, NotSerialized)
|
||||
{
|
||||
Name (TMP, ResourceTemplate () {
|
||||
IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
|
||||
IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
|
||||
IRQNoFlags () {12}
|
||||
})
|
||||
Return (TMP)
|
||||
}
|
||||
}
|
||||
|
||||
/* PS/2 floppy controller */
|
||||
Device (FDC0)
|
||||
{
|
||||
Name (_HID, EisaId ("PNP0700"))
|
||||
Method (_STA, 0, NotSerialized)
|
||||
{
|
||||
Return (0x0f)
|
||||
}
|
||||
Method (_CRS, 0, NotSerialized)
|
||||
{
|
||||
Name (BUF0, ResourceTemplate () {
|
||||
IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x06)
|
||||
IO (Decode16, 0x03F7, 0x03F7, 0x00, 0x01)
|
||||
IRQNoFlags () {6}
|
||||
DMA (Compatibility, NotBusMaster, Transfer8) {2}
|
||||
})
|
||||
Return (BUF0)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -19,6 +19,8 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
uses HAVE_ACPI_TABLES
|
||||
|
||||
config chip.h
|
||||
driver mcp55.o
|
||||
driver mcp55_usb.o
|
||||
|
|
@ -33,3 +35,6 @@ driver mcp55_pci.o
|
|||
driver mcp55_pcie.o
|
||||
driver mcp55_ht.o
|
||||
object mcp55_reset.o
|
||||
if HAVE_ACPI_TABLES
|
||||
object mcp55_fadt.o
|
||||
end
|
||||
|
|
|
|||
|
|
@ -0,0 +1,173 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
|
||||
* Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
|
||||
* Copyright (C) 2009 Harald Gutmann <harald.gutmann@gmx.net>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <console/console.h>
|
||||
#include <string.h>
|
||||
#include <arch/acpi.h>
|
||||
#include <arch/io.h>
|
||||
#include <device/device.h>
|
||||
#include <device/pci_ids.h>
|
||||
|
||||
extern unsigned pm_base;
|
||||
|
||||
/* Create the Fixed ACPI Description Tables (FADT) for this board. */
|
||||
void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
|
||||
{
|
||||
acpi_header_t *header = &(fadt->header);
|
||||
device_t dev;
|
||||
int is_mcp55 = 0;
|
||||
dev = dev_find_device(PCI_VENDOR_ID_NVIDIA,
|
||||
PCI_DEVICE_ID_NVIDIA_MCP55_LPC, 0);
|
||||
if (dev)
|
||||
is_mcp55 = 1;
|
||||
|
||||
memset((void *) fadt, 0, sizeof(acpi_fadt_t));
|
||||
memcpy(header->signature, "FACP", 4);
|
||||
header->length = sizeof(acpi_fadt_t);
|
||||
header->revision = 1;
|
||||
memcpy(header->oem_id, "GBT", 6);
|
||||
memcpy(header->oem_table_id, "COREBOOT ", 8);
|
||||
memcpy(header->asl_compiler_id, "CORE", 4);
|
||||
header->asl_compiler_revision = 42;
|
||||
|
||||
printk_info("ACPI: pm_base: %u...\n", pm_base);
|
||||
|
||||
fadt->firmware_ctrl = facs;
|
||||
fadt->dsdt = dsdt;
|
||||
fadt->preferred_pm_profile = 1; //check
|
||||
fadt->sci_int = 9;
|
||||
/* disable system management mode by setting to 0 */
|
||||
fadt->smi_cmd = 0x0; //pm_base+0x42e; (value from proprietary acpi fadt)
|
||||
fadt->acpi_enable = 0xa1;
|
||||
fadt->acpi_disable = 0xa0;
|
||||
fadt->s4bios_req = 0x0;
|
||||
fadt->pstate_cnt = 0x0;
|
||||
|
||||
fadt->pm1a_evt_blk = pm_base;
|
||||
fadt->pm1b_evt_blk = 0x0;
|
||||
fadt->pm1a_cnt_blk = pm_base + 0x4;
|
||||
fadt->pm1b_cnt_blk = 0x0;
|
||||
fadt->pm2_cnt_blk = pm_base + 0x1c;
|
||||
fadt->pm_tmr_blk = pm_base + 0x8;
|
||||
fadt->gpe0_blk = pm_base + 0x20;
|
||||
|
||||
fadt->pm1_evt_len = 4;
|
||||
fadt->pm1_cnt_len = 2;
|
||||
fadt->pm2_cnt_len = 1;
|
||||
fadt->pm_tmr_len = 4;
|
||||
fadt->gpe0_blk_len = 8;
|
||||
if (is_mcp55) {
|
||||
fadt->gpe1_blk = pm_base + 0x4a0;
|
||||
fadt->gpe1_base = 0x20;
|
||||
fadt->gpe1_blk_len = 0x10;
|
||||
}
|
||||
else {
|
||||
fadt->gpe1_blk = 0x0;
|
||||
fadt->gpe1_base = 0x0;
|
||||
fadt->gpe1_blk_len = 0x0;
|
||||
}
|
||||
|
||||
fadt->cst_cnt = 0;
|
||||
fadt->p_lvl2_lat = 0x65;
|
||||
fadt->p_lvl3_lat = 0x3e9;
|
||||
fadt->flush_size = 0;
|
||||
fadt->flush_stride = 0;
|
||||
fadt->duty_offset = 1;
|
||||
fadt->duty_width = 3;
|
||||
fadt->day_alrm = 0x7d;
|
||||
fadt->mon_alrm = 0x7e;
|
||||
fadt->century = 0x32;
|
||||
|
||||
fadt->iapc_boot_arch = 0x0;
|
||||
|
||||
fadt->flags = 0x4a5;
|
||||
fadt->reset_reg.space_id = 0;
|
||||
fadt->reset_reg.bit_width = 0;
|
||||
fadt->reset_reg.bit_offset = 0;
|
||||
fadt->reset_reg.resv = 0;
|
||||
fadt->reset_reg.addrl = 0x0;
|
||||
fadt->reset_reg.addrh = 0x0;
|
||||
|
||||
fadt->reset_value = 0;
|
||||
fadt->x_firmware_ctl_l = facs;
|
||||
fadt->x_firmware_ctl_h = 0;
|
||||
fadt->x_dsdt_l = dsdt;
|
||||
fadt->x_dsdt_h = 0;
|
||||
|
||||
fadt->x_pm1a_evt_blk.space_id = 1;
|
||||
fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
|
||||
fadt->x_pm1a_evt_blk.bit_offset = 0;
|
||||
fadt->x_pm1a_evt_blk.resv = 0;
|
||||
fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk;
|
||||
fadt->x_pm1a_evt_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_pm1b_evt_blk.space_id = 1;
|
||||
fadt->x_pm1b_evt_blk.bit_width = fadt->pm1_evt_len * 8;
|
||||
fadt->x_pm1b_evt_blk.bit_offset = 0;
|
||||
fadt->x_pm1b_evt_blk.resv = 0;
|
||||
fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk;
|
||||
fadt->x_pm1b_evt_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_pm1a_cnt_blk.space_id = 1;
|
||||
fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
|
||||
fadt->x_pm1a_cnt_blk.bit_offset = 0;
|
||||
fadt->x_pm1a_cnt_blk.resv = 0;
|
||||
fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk;
|
||||
fadt->x_pm1a_cnt_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_pm1b_cnt_blk.space_id = 1;
|
||||
fadt->x_pm1b_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
|
||||
fadt->x_pm1b_cnt_blk.bit_offset = 0;
|
||||
fadt->x_pm1b_cnt_blk.resv = 0;
|
||||
fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk;
|
||||
fadt->x_pm1b_cnt_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_pm2_cnt_blk.space_id = 1;
|
||||
fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8;
|
||||
fadt->x_pm2_cnt_blk.bit_offset = 0;
|
||||
fadt->x_pm2_cnt_blk.resv = 0;
|
||||
fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk;
|
||||
fadt->x_pm2_cnt_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_pm_tmr_blk.space_id = 1;
|
||||
fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;
|
||||
fadt->x_pm_tmr_blk.bit_offset = 0;
|
||||
fadt->x_pm_tmr_blk.resv = 0;
|
||||
fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
|
||||
fadt->x_pm_tmr_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_gpe0_blk.space_id = 1;
|
||||
fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8;
|
||||
fadt->x_gpe0_blk.bit_offset = 0;
|
||||
fadt->x_gpe0_blk.resv = 0;
|
||||
fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
|
||||
fadt->x_gpe0_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_gpe1_blk.space_id = 1;
|
||||
fadt->x_gpe1_blk.bit_width = fadt->gpe1_blk_len * 8;;
|
||||
fadt->x_gpe1_blk.bit_offset = 0;
|
||||
fadt->x_gpe1_blk.resv = 0;
|
||||
fadt->x_gpe1_blk.addrl = fadt->gpe1_blk;
|
||||
fadt->x_gpe1_blk.addrh = 0x0;
|
||||
|
||||
header->checksum = acpi_checksum((void *) fadt, header->length);
|
||||
}
|
||||
|
|
@ -155,7 +155,6 @@ static void lpc_slave_init(device_t dev)
|
|||
lpc_common_init(dev, 0);
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void enable_hpet(struct device *dev)
|
||||
{
|
||||
unsigned long hpet_address;
|
||||
|
|
@ -164,7 +163,6 @@ static void enable_hpet(struct device *dev)
|
|||
hpet_address=pci_read_config32(dev,0x44)& 0xfffffffe;
|
||||
printk_debug("enabling HPET @0x%x\n", hpet_address);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void lpc_init(device_t dev)
|
||||
{
|
||||
|
|
@ -242,7 +240,7 @@ static void lpc_init(device_t dev)
|
|||
isa_dma_init();
|
||||
|
||||
/* Initialize the High Precision Event Timers */
|
||||
// enable_hpet(dev);
|
||||
enable_hpet(dev);
|
||||
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue