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nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree 

Change-Id: I9dd254eddc12966154776d8a2d43f002567e758f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69290
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2022-11-07 08:34:41 +01:00 committed by Felix Held
parent e2949b7c9c
commit 62eb94c9d3
4 changed files with 8 additions and 13 deletions
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2
src/mainboard/lenovo/t410/devicetree.cb
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@ -18,12 +18,14 @@ chip northbridge/intel/ironlake
register "gpu_pch_backlight" = "0x061a061a" register "gpu_pch_backlight" = "0x061a061a"
device cpu_cluster 0 on device cpu_cluster 0 on
ops ironlake_cpu_bus_ops
chip cpu/intel/model_2065x chip cpu/intel/model_2065x
device lapic 0 on end device lapic 0 on end
end end
end end
device domain 0 on device domain 0 on
ops ironlake_pci_domain_ops
device pci 00.0 on # Host bridge device pci 00.0 on # Host bridge
subsystemid 0x17aa 0x2193 subsystemid 0x17aa 0x2193
end end

2
src/mainboard/lenovo/x201/devicetree.cb
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@ -19,12 +19,14 @@ chip northbridge/intel/ironlake
register "gpu_pch_backlight" = "0x061a061a" register "gpu_pch_backlight" = "0x061a061a"
device cpu_cluster 0 on device cpu_cluster 0 on
ops ironlake_cpu_bus_ops
chip cpu/intel/model_2065x chip cpu/intel/model_2065x
device lapic 0 on end device lapic 0 on end
end end
end end
device domain 0 on device domain 0 on
ops ironlake_pci_domain_ops
device pci 00.0 on # Host bridge device pci 00.0 on # Host bridge
subsystemid 0x17aa 0x2193 subsystemid 0x17aa 0x2193
end end

2
src/mainboard/packardbell/ms2290/devicetree.cb
View File

@ -19,12 +19,14 @@ chip northbridge/intel/ironlake
register "gpu_pch_backlight" = "0x061a061a" register "gpu_pch_backlight" = "0x061a061a"
device cpu_cluster 0 on device cpu_cluster 0 on
ops ironlake_cpu_bus_ops
chip cpu/intel/model_2065x chip cpu/intel/model_2065x
device lapic 0 on end device lapic 0 on end
end end
end end
device domain 0 on device domain 0 on
ops ironlake_pci_domain_ops
device pci 00.0 on # Host bridge device pci 00.0 on # Host bridge
subsystemid 0x1025 0x0379 subsystemid 0x1025 0x0379
end end

15
src/northbridge/intel/ironlake/northbridge.c
View File

@ -75,7 +75,7 @@ static const char *northbridge_acpi_name(const struct device *dev)
} }
#endif #endif
static struct device_operations pci_domain_ops = { struct device_operations ironlake_pci_domain_ops = {
.read_resources = pci_domain_read_resources, .read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources, .set_resources = pci_domain_set_resources,
.scan_bus = pci_domain_scan_bus, .scan_bus = pci_domain_scan_bus,
@ -217,24 +217,13 @@ static const struct pci_driver mc_driver_ilk __pci_driver = {
.devices = pci_device_ids, .devices = pci_device_ids,
}; };
static struct device_operations cpu_bus_ops = { struct device_operations ironlake_cpu_bus_ops = {
.read_resources = noop_read_resources, .read_resources = noop_read_resources,
.set_resources = noop_set_resources, .set_resources = noop_set_resources,
.init = mp_cpu_bus_init, .init = mp_cpu_bus_init,
}; };
static void enable_dev(struct device *dev)
{
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_DOMAIN) {
dev->ops = &pci_domain_ops;
} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
dev->ops = &cpu_bus_ops;
}
}
struct chip_operations northbridge_intel_ironlake_ops = { struct chip_operations northbridge_intel_ironlake_ops = {
CHIP_NAME("Intel Ironlake integrated Northbridge") CHIP_NAME("Intel Ironlake integrated Northbridge")
.enable_dev = enable_dev,
.init = ironlake_init, .init = ironlake_init,
}; };