SMM: Fix state table for Intel Core2 CPUs

When fixing the SMM state table for SandyBridge/IvyBridge CPUs
the wrong table was used for older 64bit capable CPUs.

Change-Id: Ia7dff21aa3f0e5aa61575634fc839777de6bef10
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1353
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Stefan Reinauer 2012-07-24 14:53:15 -07:00 committed by Stefan Reinauer
parent 54cba3b4ad
commit 62f1ad98c4
1 changed files with 1 additions and 0 deletions

View File

@ -158,6 +158,7 @@ void smi_handler(u32 smm_revision)
state_save.type = EM64T;
state_save.em64t_state_save = (em64t_smm_state_save_area_t *)
(smm_base + 0x7d00 - (node * 0x400));
break;
case 0x00030101: /* SandyBridge/IvyBridge */
state_save.type = EM64T101;
state_save.em64t101_state_save =