SMM: Fix state table for Intel Core2 CPUs
When fixing the SMM state table for SandyBridge/IvyBridge CPUs the wrong table was used for older 64bit capable CPUs. Change-Id: Ia7dff21aa3f0e5aa61575634fc839777de6bef10 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1353 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -158,6 +158,7 @@ void smi_handler(u32 smm_revision)
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state_save.type = EM64T;
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state_save.em64t_state_save = (em64t_smm_state_save_area_t *)
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(smm_base + 0x7d00 - (node * 0x400));
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break;
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case 0x00030101: /* SandyBridge/IvyBridge */
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state_save.type = EM64T101;
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state_save.em64t101_state_save =
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