diff --git a/src/mainboard/intel/mtlrvp/Makefile.inc b/src/mainboard/intel/mtlrvp/Makefile.inc index 09a23e0354..56ec7bd7f5 100644 --- a/src/mainboard/intel/mtlrvp/Makefile.inc +++ b/src/mainboard/intel/mtlrvp/Makefile.inc @@ -1,6 +1,9 @@ ## SPDX-License-Identifier: GPL-2.0-or-later ramstage-y += ec.c +ramstage-y += mainboard.c + +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR)) diff --git a/src/mainboard/intel/mtlrvp/mainboard.c b/src/mainboard/intel/mtlrvp/mainboard.c new file mode 100644 index 0000000000..01ce0a2163 --- /dev/null +++ b/src/mainboard/intel/mtlrvp/mainboard.c @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include +#include +#include +#include + +const char *smbios_system_sku(void) +{ + static char sku_str[7] = ""; + uint8_t sku_id = get_rvp_board_id(); + + snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); + return sku_str; +} + +const char *mainboard_vbt_filename(void) +{ + return "vbt.bin"; +} + +void mainboard_update_soc_chip_config(struct soc_intel_meteorlake_config *cfg) +{ + /* TODO: Update mainboard */ +} + +static void mainboard_init(void *chip_info) +{ + if (CONFIG(EC_GOOGLE_CHROMEEC)) + mainboard_ec_init(); +} + +static void mainboard_enable(struct device *dev) +{ + /* TODO: Enable mainboard */ +} + +struct chip_operations mainboard_ops = { + .init = mainboard_init, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/intel/mtlrvp/smihandler.c b/src/mainboard/intel/mtlrvp/smihandler.c new file mode 100644 index 0000000000..a3b43231ec --- /dev/null +++ b/src/mainboard/intel/mtlrvp/smihandler.c @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include + +void mainboard_smi_espi_handler(void) +{ + if (!CONFIG(EC_GOOGLE_CHROMEEC)) + return; + + chromeec_smi_process_events(); +} + +void mainboard_smi_sleep(u8 slp_typ) +{ + if (!CONFIG(EC_GOOGLE_CHROMEEC)) + return; + + chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS); +} + +int mainboard_smi_apmc(u8 apmc) +{ + if (CONFIG(EC_GOOGLE_CHROMEEC)) + chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); + + return 0; +}