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veyron_jerry: Port CPU overshoot prevention 

This patch ports commit 567f616f (rk3288: slowly raise to max cpu
voltage to prevent overshoot) to Veyron_Jerry. It also fixes include
ordering and some comment grammar in the affected code.

BRANCH=None
BUG=chrome-os-partner:32716
TEST=None

Change-Id: I4ac14a38e4b3acc4926d4f51f409ff12d9c841cf
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 679014bc843788e8d4d5f5c7470ae76f8be5e942
Original-Change-Id: I9c0aba40ddd8a0852391df184034baa740d063df
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/228938
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9550
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Julius Werner 2014-11-10 19:53:45 -08:00 committed by Patrick Georgi
parent 539e856643
commit 63451c73bd
2 changed files with 10 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/mainboard/google/veyron_jerry/bootblock.c
View File

@ -20,6 +20,7 @@
#include <arch/io.h> #include <arch/io.h>
#include <bootblock_common.h> #include <bootblock_common.h>
#include <delay.h>
#include <soc/clock.h> #include <soc/clock.h>
#include <soc/i2c.h> #include <soc/i2c.h>
#include <soc/grf.h> #include <soc/grf.h>
@ -32,11 +33,16 @@
void bootblock_mainboard_init(void) void bootblock_mainboard_init(void)
{ {
/* cpu frequency will up to 1.8GHz, so the buck1 must up to 1.3v */ /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
i2c_init(PMIC_BUS, 400*KHz); i2c_init(PMIC_BUS, 400*KHz);
rk808_configure_buck(PMIC_BUS, 1, 1300);
/* Slowly raise to max CPU voltage to prevent overshoot */
rk808_configure_buck(PMIC_BUS, 1, 1200);
udelay(175);/* Must wait for voltage to stabilize,2mV/us */
rk808_configure_buck(PMIC_BUS, 1, 1400);
udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu(); rkclk_configure_cpu();
/* i2c1 for tpm */ /* i2c1 for tpm */

7
src/mainboard/google/veyron_pinky/bootblock.c
View File

@ -20,6 +20,7 @@
#include <arch/io.h> #include <arch/io.h>
#include <bootblock_common.h> #include <bootblock_common.h>
#include <delay.h>
#include <soc/clock.h> #include <soc/clock.h>
#include <soc/i2c.h> #include <soc/i2c.h>
#include <soc/grf.h> #include <soc/grf.h>
@ -27,16 +28,12 @@
#include <soc/rk808.h> #include <soc/rk808.h>
#include <soc/spi.h> #include <soc/spi.h>
#include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/chromeos.h>
#include <delay.h>
#include "board.h" #include "board.h"
void bootblock_mainboard_init(void) void bootblock_mainboard_init(void)
{ {
/* cpu frequency will up to 1.8GHz, /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
* in our experience the buck1
* must up to 1.4v
*/
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
i2c_init(PMIC_BUS, 400*KHz); i2c_init(PMIC_BUS, 400*KHz);