diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index 989acd9d25..f393019737 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -49,6 +49,11 @@ chip soc/intel/apollolake
 	# Enable DPTF
 	register "dptf_enable" = "1"
 
+	# PL1 override 12000 mW: the energy calculation is wrong with the
+	# current VR solution. Experiments show that SoC TDP max (6W) can
+	# be reached when RAPL PL1 is set to 12W.
+	register "tdp_pl1_override_mw" = "12000"
+
 	# Enable Audio Clock and Power gating
 	register "hdaudio_clk_gate_enable" = "1"
 	register "hdaudio_pwr_gate_enable" = "1"