drivers/intel/i210: Add new driver for Intel i210 MACPHY
Add a new driver for Intel i210 MACPHY with the goal to update the MAC address in i210 if it is found during PCI scan. Change-Id: I4d4e797543a9f278fb649596f63ae8e1f285b3c3 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: http://review.coreboot.org/8404 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
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63693dca06
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@ -18,3 +18,4 @@
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##
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##
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source src/drivers/intel/gma/Kconfig
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source src/drivers/intel/gma/Kconfig
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source src/drivers/intel/i210/Kconfig
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@ -1,3 +1,4 @@
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subdirs-y += gma
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subdirs-y += gma
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subdirs-y += wifi
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subdirs-y += wifi
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subdirs-$(CONFIG_PLATFORM_USES_FSP) += fsp
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subdirs-$(CONFIG_PLATFORM_USES_FSP) += fsp
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subdirs-$(CONFIG_DRIVER_INTEL_I210) += i210
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@ -0,0 +1,3 @@
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config DRIVER_INTEL_I210
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bool
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default n
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ramstage-y += i210.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Siemens AG.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "i210.h"
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#include <device/device.h>
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#include <console/console.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <string.h>
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#include <types.h>
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#include <delay.h>
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/* We need one function we can call to get a MAC address to use */
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/* This function can be coded somewhere else but must exist. */
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extern enum cb_err mainboard_get_mac_address(u16 bus, u8 devfn, u8 mac[6]);
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/* This is a private function to wait for a bit mask in a given register */
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/* To avoid endless loops, a time-out is implemented here. */
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static int wait_done(u32* reg, u32 mask)
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{
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u32 timeout = I210_POLL_TIMEOUT_US;
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while (!(*reg & mask)) {
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udelay(1);
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if (!--timeout)
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return I210_NOT_READY;
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}
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return I210_SUCCESS;
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}
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/** \brief This function can read the configuration space of the MACPHY
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* For this purpose, the EEPROM interface is used. No direct access
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* to the flash memory will be done.
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* @param *dev Pointer to the PCI device of this MACPHY
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* @param address Address inside the flash where reading will start
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* @param count Number of words (16 bit values) to read
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* @param *buffer Pointer to the buffer where to store read data
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* @return void I210_NO_ERROR or an error code
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*/
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static u32 read_flash(struct device *dev, u32 address, u32 count, u16 *buffer)
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{
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u32 bar;
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u32 *eeprd;
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u32 i;
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/* Get the BAR to memory mapped space*/
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bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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if ((!bar) || ((address + count) > 0x40))
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return I210_INVALID_PARAM;
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eeprd = (u32*)(bar + I210_REG_EEREAD);
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/* Prior to start ensure flash interface is ready by checking DONE-bit */
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if (wait_done(eeprd, I210_DONE))
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return I210_NOT_READY;
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/*OK, interface is ready, we can use it now */
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for (i = 0; i < count; i++) {
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/* To start a read cycle write desired address in bits 12..2 */
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*eeprd = ((address + i) << 2) & 0x1FFC;
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/* Wait until read is done */
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if (wait_done(eeprd, I210_DONE))
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return I210_READ_ERROR;
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/* Here, we can read back desired word in bits 31..16 */
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buffer[i] = (*eeprd & 0xffff0000) >> 16;
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}
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return I210_SUCCESS;
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}
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/** \brief This function computes the checksum for the configuration space.
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* The address range for the checksum is 0x00..0x3e.
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* @param *dev Pointer to the PCI device of this MACPHY
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* @param *checksum Pointer to the buffer where to store the checksum
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* @return void I210_NO_ERROR or an error code
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*/
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static u32 compute_checksum(struct device *dev, u16 *checksum)
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{
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u16 eep_data[0x40];
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u32 i;
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/* First read back data to compute the checksum for */
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if (read_flash(dev, 0, 0x3f, eep_data))
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return I210_READ_ERROR;
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/* The checksum is computed in that way that after summarize all the */
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/* data from word address 0 to 0x3f the result is 0xBABA. */
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*checksum = 0;
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for (i = 0; i < 0x3f; i++)
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*checksum += eep_data[i];
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*checksum = I210_TARGET_CHECKSUM - *checksum;
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return I210_SUCCESS;
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}
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/** \brief This function can write the configuration space of the MACPHY
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* For this purpose, the EEPROM interface is used. No direct access
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* to the flash memory will be done. This function will update
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* the checksum after a value was changed.
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* @param *dev Pointer to the PCI device of this MACPHY
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* @param address Address inside the flash where writing will start
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* @param count Number of words (16 bit values) to write
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* @param *buffer Pointer to the buffer where data to write is stored in
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* @return void I210_NO_ERROR or an error code
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*/
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static u32 write_flash(struct device *dev, u32 address, u32 count, u16 *buffer)
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{
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u32 bar;
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u32 *eepwr;
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u32 *eectrl;
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u16 checksum;
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u32 i;
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/* Get the BAR to memory mapped space */
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bar = pci_read_config32(dev, 0x10);
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if ((!bar) || ((address + count) > 0x40))
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return I210_INVALID_PARAM;
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eepwr = (u32*)(bar + I210_REG_EEWRITE);
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eectrl = (u32*)(bar + I210_REG_EECTRL);
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/* Prior to start ensure flash interface is ready by checking DONE-bit */
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if (wait_done(eepwr, I210_DONE))
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return I210_NOT_READY;
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/* OK, interface is ready, we can use it now */
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for (i = 0; i < count; i++) {
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/* To start a write cycle write desired address in bits 12..2 */
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/* and data to write in bits 31..16 into EEWRITE-register */
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*eepwr = ((((address + i) << 2) & 0x1FFC) | (buffer[i] << 16));
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/* Wait until write is done */
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if (wait_done(eepwr, I210_DONE))
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return I210_WRITE_ERROR;
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}
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/* Since we have modified data, we need to update the checksum */
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if (compute_checksum(dev, &checksum))
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return I210_CHECKSUM_ERROR;
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*eepwr = (0x3f << 2) | checksum << 16;
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if (wait_done(eepwr, I210_DONE))
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return I210_WRITE_ERROR;
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/* Up to now, desired data was written into shadowed RAM. We now need */
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/* to perform a flash cycle to bring the shadowed RAM into flash memory. */
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/* To start a flash cycle we need to set FLUPD-bit and wait for FLDONE. */
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*eectrl = *eectrl | I210_FLUPD;
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if (wait_done(eectrl, I210_FLUDONE))
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return I210_FLASH_UPDATE_ERROR;
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return I210_SUCCESS;
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}
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/** \brief This function can read the MAC address out of the MACPHY
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* @param *dev Pointer to the PCI device of this MACPHY
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* @param *MACAdr Pointer to the buffer where to store read MAC address
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* @return void I210_NO_ERROR or an error code
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*/
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static u32 read_mac_adr(struct device *dev, u8 *mac_adr)
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{
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u16 adr[3];
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if (!dev || !mac_adr)
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return I210_INVALID_PARAM;
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if (read_flash(dev, 0, 3, adr))
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return I210_READ_ERROR;
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/* Copy the address into destination. This is done because of */
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/* possible not matching alignment for destination to u16 boundary. */
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memcpy(mac_adr, (u8*)adr, 6);
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return I210_SUCCESS;
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}
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/** \brief This function can write the MAC address to the MACPHY
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* @param *dev Pointer to the PCI device of this MACPHY
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* @param *MACAdr Pointer to the buffer where the desired MAC address is
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* @return void I210_NO_ERROR or an error code
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*/
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static u32 write_mac_adr(struct device *dev, u8 *mac_adr)
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{
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u16 adr[3];
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if (!dev || !mac_adr)
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return I210_INVALID_PARAM;
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/* Copy desired address into a local buffer to avoid alignment issues */
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memcpy((u8*)adr, mac_adr, 6);
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return write_flash(dev, 0, 3, adr);
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}
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/** \brief This function is the driver entry point for the init phase
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* of the PCI bus allocator. It will program a MAC address
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* into the MACPHY.
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* @param *dev Pointer to the used PCI device
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* @return void Nothing is given back
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*/
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static void init(struct device *dev)
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{
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u8 cur_adr[6];
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u8 adr_to_set[6];
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enum cb_err status;
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/*Check first whether there is a valid MAC address available */
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status = mainboard_get_mac_address(dev->bus->subordinate,
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dev->path.pci.devfn, adr_to_set);
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if (status != CB_SUCCESS) {
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printk(BIOS_ERR, "I210: No valid MAC address found\n");
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return;
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}
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/* Before we will write a new address, check the existing one */
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if (read_mac_adr(dev, cur_adr)) {
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printk(BIOS_ERR, "I210: Not able to read MAC address.\n");
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return;
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}
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if (memcmp(cur_adr, adr_to_set, 6)) {
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if (write_mac_adr(dev, adr_to_set))
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printk(BIOS_ERR, "I210: Error setting MAC address\n");
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else
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printk(BIOS_INFO, "I210: MAC address changed.\n");
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} else {
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printk(BIOS_INFO, "I210: MAC address is up to date.\n");
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}
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return;
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}
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static struct device_operations i210_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = init,
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.scan_bus = 0,
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.ops_pci = 0,
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};
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static const unsigned short i210_device_ids[] = { 0x1538, 0x1533, 0 };
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static const struct pci_driver i210_driver __pci_driver = {
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.ops = &i210_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = i210_device_ids,
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};
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Siemens AG
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef _INTEL_I210_H_
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#define _INTEL_I210_H_
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#define I210_PCI_MEM_BAR_OFFSET 0x10
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#define I210_REG_EECTRL 0x12010 /* Offset for EEPROM control reg */
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#define I210_FLUPD 0x800000 /* Start flash update bit */
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#define I210_FLUDONE 0x4000000 /* Flash update done indicator */
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#define I210_REG_EEREAD 0x12014 /* Offset for EEPROM read reg */
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#define I210_REG_EEWRITE 0x12018 /* Offset for EEPROM write reg */
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#define I210_CMDV 0x01 /* command valid bit */
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#define I210_DONE 0x02 /* command done bit */
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#define I210_TARGET_CHECKSUM 0xBABA /* resulting checksum */
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/*define some other useful values here */
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#define I210_POLL_TIMEOUT_US 300000 /* 300 ms */
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/*Define some error states here*/
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#define I210_SUCCESS 0x00000000
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#define I210_INVALID_PARAM 0x00000001
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#define I210_NOT_READY 0x00000002
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#define I210_READ_ERROR 0x00000004
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#define I210_WRITE_ERROR 0x00000008
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#define I210_CHECKSUM_ERROR 0x00000010
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#define I210_FLASH_UPDATE_ERROR 0x00000020
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#endif /* _INTEL_I210_H_ */
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