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nb/intel/haswell/finalize.c: Drop obsolete SA PM lock 

This register had a lock bit on Sandy Bridge, but does not on Haswell.
Moreover, the bit remains cleared on Asrock B85M Pro4 with coreboot.
Therefore, remove the write to this bit, because it has no effect.

Tested on Asrock B85M Pro4, still boots.

Change-Id: I382a6d69233ced5af069767eb61b56741ed665be
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46678
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-23 10:46:37 +02:00
parent 385ce9f4f8
commit 63837b0af0
1 changed files with 0 additions and 1 deletions
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src/northbridge/intel/haswell/finalize.c
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@ -18,7 +18,6 @@ void intel_northbridge_haswell_finalize_smm(void)
pci_or_config32(HOST_BRIDGE, TOLUD, 1 << 0); pci_or_config32(HOST_BRIDGE, TOLUD, 1 << 0);
MCHBAR32_OR(MMIO_PAVP_MSG, 1 << 0); /* PAVP */ MCHBAR32_OR(MMIO_PAVP_MSG, 1 << 0); /* PAVP */
MCHBAR32_OR(SAPMCTL, 1UL << 31); /* SA PM */
MCHBAR32_OR(UMAGFXCTL, 1 << 0); /* UMA GFX */ MCHBAR32_OR(UMAGFXCTL, 1 << 0); /* UMA GFX */
MCHBAR32_OR(VTDTRKLCK, 1 << 0); /* VTDTRK */ MCHBAR32_OR(VTDTRKLCK, 1 << 0); /* VTDTRK */
MCHBAR32_OR(REQLIM, 1UL << 31); MCHBAR32_OR(REQLIM, 1UL << 31);