diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index 2fb37caa9d..c79f2acfbd 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -111,7 +111,6 @@ static void pch_finalize_script(void)
 	u16 tcocnt;
 	uint8_t *pmcbase;
 	config_t *config;
-	u32 pmsyncreg;
 	u8 reg8;
 
 	/* Set FAST_SPI opcode menu */
@@ -120,22 +119,17 @@ static void pch_finalize_script(void)
 	/* Lock FAST_SPIBAR */
 	fast_spi_lock_bar();
 
-	/*TCO Lock down */
+	/* TCO Lock down */
 	tcobase = smbus_tco_regs();
 	tcocnt = inw(tcobase + TCO1_CNT);
 	tcocnt |= TCO_LOCK;
 	outw(tcocnt, tcobase + TCO1_CNT);
 
-	/* PMSYNC */
-	pmcbase = pmc_mmio_regs();
-	pmsyncreg = read32(pmcbase + PMSYNC_TPR_CFG);
-	pmsyncreg |= PMSYNC_LOCK;
-	write32(pmcbase + PMSYNC_TPR_CFG, pmsyncreg);
-
 	/* Display me status before we hide it */
 	intel_me_status();
 
 	dev = PCH_DEV_PMC;
+	pmcbase = pmc_mmio_regs();
 	config = dev->chip_info;
 
 	/*
diff --git a/src/soc/intel/skylake/lockdown.c b/src/soc/intel/skylake/lockdown.c
index ac138c20b3..f2a9e8b19f 100644
--- a/src/soc/intel/skylake/lockdown.c
+++ b/src/soc/intel/skylake/lockdown.c
@@ -18,6 +18,7 @@
 #include <chip.h>
 #include <soc/lpc.h>
 #include <soc/pci_devs.h>
+#include <soc/pm.h>
 #include <string.h>
 
 static void lpc_lockdown_config(void)
@@ -42,10 +43,25 @@ static void lpc_lockdown_config(void)
 	pci_read_config8(dev, BIOS_CNTL);
 }
 
+static void pmc_lockdown_config(void)
+{
+	uint8_t *pmcbase;
+	u32 pmsyncreg;
+
+	/* PMSYNC */
+	pmcbase = pmc_mmio_regs();
+	pmsyncreg = read32(pmcbase + PMSYNC_TPR_CFG);
+	pmsyncreg |= PMSYNC_LOCK;
+	write32(pmcbase + PMSYNC_TPR_CFG, pmsyncreg);
+}
+
 static void platform_lockdown_config(void *unused)
 {
 	/* LPC lock down configuration */
 	lpc_lockdown_config();
+
+	/* PMC lock down configuration */
+	pmc_lockdown_config();
 }
 
 BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, platform_lockdown_config,