soc/amd/common/block/psp/psp_gen2: factor out pspv2_mbox_command union
The pspv2_mbox struct contained an unnamed union that covered the 32 bits of the command register of the PSP v2 mailbox. Since the pspv2_mbox struct is mainly used for hardware register accesses and the union part is mostly used to access the different bits before/after writing/reading the command register, split this functionality. For the register access a command field is added to the pspv2_mbox struct instead of the unnamed union and for accessing the separate bits of the command register a new named union is added. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: If3f00b6fd73c3f749154b77b940e6d5aa385ec49 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63963 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
parent
81d0d89613
commit
63e7b70641
|
@ -13,7 +13,11 @@
|
||||||
#define PSP_MAILBOX_OFFSET 0x10570
|
#define PSP_MAILBOX_OFFSET 0x10570
|
||||||
|
|
||||||
struct pspv2_mbox {
|
struct pspv2_mbox {
|
||||||
union {
|
u32 command;
|
||||||
|
u64 buffer;
|
||||||
|
} __packed;
|
||||||
|
|
||||||
|
union pspv2_mbox_command {
|
||||||
u32 val;
|
u32 val;
|
||||||
struct pspv2_mbox_cmd_fields {
|
struct pspv2_mbox_cmd_fields {
|
||||||
u16 mbox_status;
|
u16 mbox_status;
|
||||||
|
@ -22,9 +26,7 @@ struct pspv2_mbox {
|
||||||
u32 recovery:1;
|
u32 recovery:1;
|
||||||
u32 ready:1;
|
u32 ready:1;
|
||||||
} __packed fields;
|
} __packed fields;
|
||||||
};
|
};
|
||||||
u64 buffer;
|
|
||||||
} __packed;
|
|
||||||
|
|
||||||
static uintptr_t soc_get_psp_base_address(void)
|
static uintptr_t soc_get_psp_base_address(void)
|
||||||
{
|
{
|
||||||
|
@ -49,7 +51,7 @@ static u16 rd_mbox_sts(struct pspv2_mbox *mbox)
|
||||||
struct pspv2_mbox_cmd_fields fields;
|
struct pspv2_mbox_cmd_fields fields;
|
||||||
} tmp = { 0 };
|
} tmp = { 0 };
|
||||||
|
|
||||||
tmp.val = read32(&mbox->val);
|
tmp.val = read32(&mbox->command);
|
||||||
return tmp.fields.mbox_status;
|
return tmp.fields.mbox_status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -62,7 +64,7 @@ static void wr_mbox_cmd(struct pspv2_mbox *mbox, u8 cmd)
|
||||||
|
|
||||||
/* Write entire 32-bit area to begin command execution */
|
/* Write entire 32-bit area to begin command execution */
|
||||||
tmp.fields.mbox_command = cmd;
|
tmp.fields.mbox_command = cmd;
|
||||||
write32(&mbox->val, tmp.val);
|
write32(&mbox->command, tmp.val);
|
||||||
}
|
}
|
||||||
|
|
||||||
static u8 rd_mbox_recovery(struct pspv2_mbox *mbox)
|
static u8 rd_mbox_recovery(struct pspv2_mbox *mbox)
|
||||||
|
@ -72,7 +74,7 @@ static u8 rd_mbox_recovery(struct pspv2_mbox *mbox)
|
||||||
struct pspv2_mbox_cmd_fields fields;
|
struct pspv2_mbox_cmd_fields fields;
|
||||||
} tmp = { 0 };
|
} tmp = { 0 };
|
||||||
|
|
||||||
tmp.val = read32(&mbox->val);
|
tmp.val = read32(&mbox->command);
|
||||||
return !!tmp.fields.recovery;
|
return !!tmp.fields.recovery;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -83,8 +85,8 @@ static void wr_mbox_buffer_ptr(struct pspv2_mbox *mbox, void *buffer)
|
||||||
|
|
||||||
static int wait_command(struct pspv2_mbox *mbox, bool wait_for_ready)
|
static int wait_command(struct pspv2_mbox *mbox, bool wait_for_ready)
|
||||||
{
|
{
|
||||||
struct pspv2_mbox and_mask = { .val = ~0 };
|
union pspv2_mbox_command and_mask = { .val = ~0 };
|
||||||
struct pspv2_mbox expected = { .val = 0 };
|
union pspv2_mbox_command expected = { .val = 0 };
|
||||||
struct stopwatch sw;
|
struct stopwatch sw;
|
||||||
u32 tmp;
|
u32 tmp;
|
||||||
|
|
||||||
|
@ -99,7 +101,7 @@ static int wait_command(struct pspv2_mbox *mbox, bool wait_for_ready)
|
||||||
stopwatch_init_msecs_expire(&sw, PSP_CMD_TIMEOUT);
|
stopwatch_init_msecs_expire(&sw, PSP_CMD_TIMEOUT);
|
||||||
|
|
||||||
do {
|
do {
|
||||||
tmp = read32(&mbox->val);
|
tmp = read32(&mbox->command);
|
||||||
tmp &= ~and_mask.val;
|
tmp &= ~and_mask.val;
|
||||||
if (tmp == expected.val)
|
if (tmp == expected.val)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
Loading…
Reference in New Issue