intel/common: Add common code for filling out ACPI _SWS
Add common code for filling out the NVS fields that are used by the ACPI _SWS methods. The SOC must provide a function to fill out the wake source data since the specific data inputs vary by platform. BUG=chrome-os-partner:40635 BRANCH=none TEST=emerge-glados coreboot Change-Id: I4f3511adcc89a9be5d97a7442055c227a38c5f42 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: cee5fa176c16ca44712bce8f3c8045daa5f07339 Original-Change-Id: I16f446ef67777acb57223a84d38062be9f43fcb9 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/298167 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11646 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
parent
ae570d5cee
commit
63ebc80e98
|
@ -69,4 +69,8 @@ config ROMSTAGE_RAM_STACK_SIZE
|
||||||
default 0x5000
|
default 0x5000
|
||||||
depends on SOC_INTEL_COMMON_STACK
|
depends on SOC_INTEL_COMMON_STACK
|
||||||
|
|
||||||
|
config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
|
||||||
|
bool
|
||||||
|
default n
|
||||||
|
|
||||||
endif # SOC_INTEL_COMMON
|
endif # SOC_INTEL_COMMON
|
||||||
|
|
|
@ -16,6 +16,7 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
|
||||||
ramstage-$(CONFIG_SOC_INTEL_COMMON_STAGE_CACHE) += stage_cache.c
|
ramstage-$(CONFIG_SOC_INTEL_COMMON_STAGE_CACHE) += stage_cache.c
|
||||||
ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += util.c
|
ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += util.c
|
||||||
ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
|
ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
|
||||||
|
ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
|
||||||
|
|
||||||
# Create and add the MRC cache to the cbfs image
|
# Create and add the MRC cache to the cbfs image
|
||||||
ifneq ($(CONFIG_CHROMEOS),y)
|
ifneq ($(CONFIG_CHROMEOS),y)
|
||||||
|
|
|
@ -0,0 +1,36 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the coreboot project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Google Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _INTEL_COMMON_ACPI_H_
|
||||||
|
#define _INTEL_COMMON_ACPI_H_
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SOC specific handler to provide the wake source data for ACPI _SWS.
|
||||||
|
*
|
||||||
|
* @pm1: PM1_STS register with only enabled events set
|
||||||
|
* @gpe0: GPE0_STS registers with only enabled events set
|
||||||
|
*
|
||||||
|
* return the number of registers in the gpe0 array or -1 if nothing
|
||||||
|
* is provided by this function.
|
||||||
|
*/
|
||||||
|
int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0);
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,36 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the coreboot project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Google Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc.
|
||||||
|
*/
|
||||||
|
|
||||||
|
Scope (\_SB)
|
||||||
|
{
|
||||||
|
Method (_SWS)
|
||||||
|
{
|
||||||
|
/* Index into PM1 for device that caused wake */
|
||||||
|
Return (\PM1I)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
Scope (\_GPE)
|
||||||
|
{
|
||||||
|
Method (_SWS)
|
||||||
|
{
|
||||||
|
/* Index into GPE for device that caused wake */
|
||||||
|
Return (\GPEI)
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,90 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the coreboot project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015 Google Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; version 2 of the License.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <arch/acpi.h>
|
||||||
|
#include <bootstate.h>
|
||||||
|
#include <cbmem.h>
|
||||||
|
#include <console/console.h>
|
||||||
|
#include <soc/nvs.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdlib.h>
|
||||||
|
#include "acpi.h"
|
||||||
|
|
||||||
|
__attribute__((weak)) int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
|
||||||
|
{
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Save wake source data for ACPI _SWS methods in NVS */
|
||||||
|
static void acpi_save_wake_source(void *unused)
|
||||||
|
{
|
||||||
|
global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
|
||||||
|
uint32_t pm1, *gpe0;
|
||||||
|
int gpe_reg, gpe_reg_count;
|
||||||
|
int reg_size = sizeof(uint32_t) * 8;
|
||||||
|
|
||||||
|
if (!gnvs)
|
||||||
|
return;
|
||||||
|
|
||||||
|
gnvs->pm1i = -1;
|
||||||
|
gnvs->gpei = -1;
|
||||||
|
|
||||||
|
gpe_reg_count = soc_fill_acpi_wake(&pm1, &gpe0);
|
||||||
|
if (gpe_reg_count < 0)
|
||||||
|
return;
|
||||||
|
|
||||||
|
/* Scan for first set bit in PM1 */
|
||||||
|
for (gnvs->pm1i = 0; gnvs->pm1i < reg_size; gnvs->pm1i++) {
|
||||||
|
if (pm1 & 1)
|
||||||
|
break;
|
||||||
|
pm1 >>= 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* If unable to determine then return -1 */
|
||||||
|
if (gnvs->pm1i >= 16)
|
||||||
|
gnvs->pm1i = -1;
|
||||||
|
|
||||||
|
/* Scan for first set bit in GPE registers */
|
||||||
|
for (gpe_reg = 0; gpe_reg < gpe_reg_count; gpe_reg++) {
|
||||||
|
uint32_t gpe = gpe0[gpe_reg];
|
||||||
|
int start = gpe_reg * reg_size;
|
||||||
|
int end = start + reg_size;
|
||||||
|
|
||||||
|
if (gpe == 0) {
|
||||||
|
if (!gnvs->gpei)
|
||||||
|
gnvs->gpei = end;
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
for (gnvs->gpei = start; gnvs->gpei < end; gnvs->gpei++) {
|
||||||
|
if (gpe & 1)
|
||||||
|
break;
|
||||||
|
gpe >>= 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* If unable to determine then return -1 */
|
||||||
|
if (gnvs->gpei >= gpe_reg_count * reg_size)
|
||||||
|
gnvs->gpei = -1;
|
||||||
|
|
||||||
|
printk(BIOS_DEBUG, "ACPI _SWS is PM1 Index %lld GPE Index %lld\n",
|
||||||
|
(long long)gnvs->pm1i, (long long)gnvs->gpei);
|
||||||
|
}
|
||||||
|
|
||||||
|
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, acpi_save_wake_source, NULL);
|
Loading…
Reference in New Issue