intel/skylake: Add elog event for THERMTRIP

The THERMTRIP status bit is in GBLRST_CAUSE instead of
GEN_PMCON like the EDSv1 indicates.  Read this status bit
and add an elog event if THERMTRIP has fired.

BUG=chrome-os-partner:48438
BRANCH=none
TEST=tested on chell EVT after thermtrip fired

Change-Id: Icd52b753c7f3ab0d48095279f1255dd2dd08fd59
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b090c7897a8f99a685f523990235d83fafa063b2
Original-Change-Id: I5a287d7fdae2ba8ae8585cb9a4d4dd873393e1e6
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/317242
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12980
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Duncan Laurie 2015-12-10 01:00:54 -08:00 committed by Patrick Georgi
parent 970132f725
commit 63f8c0af4b
2 changed files with 5 additions and 2 deletions

View File

@ -70,8 +70,9 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
static void pch_log_power_and_resets(struct chipset_power_state *ps) static void pch_log_power_and_resets(struct chipset_power_state *ps)
{ {
/* TODO: Thermal Trip Status. There is a thermal device and /* Thermal Trip */
* other status registers. */ if (ps->gblrst_cause[0] & GBLRST_CAUSE0_THERMTRIP)
elog_add_event(ELOG_TYPE_THERM_TRIP);
/* PWR_FLR Power Failure */ /* PWR_FLR Power Failure */
if (ps->gen_pmcon_b & PWR_FLR) if (ps->gen_pmcon_b & PWR_FLR)

View File

@ -135,6 +135,8 @@
#define SWGPE_EN (1 << 2) #define SWGPE_EN (1 << 2)
#define HOT_PLUG_EN (1 << 1) #define HOT_PLUG_EN (1 << 1)
#define GBLRST_CAUSE0_THERMTRIP (1 << 5)
#define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_OFF 0
#define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_ON 1
#define MAINBOARD_POWER_KEEP 2 #define MAINBOARD_POWER_KEEP 2