intel/skylake: Add elog event for THERMTRIP
The THERMTRIP status bit is in GBLRST_CAUSE instead of GEN_PMCON like the EDSv1 indicates. Read this status bit and add an elog event if THERMTRIP has fired. BUG=chrome-os-partner:48438 BRANCH=none TEST=tested on chell EVT after thermtrip fired Change-Id: Icd52b753c7f3ab0d48095279f1255dd2dd08fd59 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b090c7897a8f99a685f523990235d83fafa063b2 Original-Change-Id: I5a287d7fdae2ba8ae8585cb9a4d4dd873393e1e6 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/317242 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12980 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -70,8 +70,9 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
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static void pch_log_power_and_resets(struct chipset_power_state *ps)
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static void pch_log_power_and_resets(struct chipset_power_state *ps)
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{
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{
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/* TODO: Thermal Trip Status. There is a thermal device and
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/* Thermal Trip */
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* other status registers. */
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if (ps->gblrst_cause[0] & GBLRST_CAUSE0_THERMTRIP)
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elog_add_event(ELOG_TYPE_THERM_TRIP);
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/* PWR_FLR Power Failure */
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/* PWR_FLR Power Failure */
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if (ps->gen_pmcon_b & PWR_FLR)
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if (ps->gen_pmcon_b & PWR_FLR)
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@ -135,6 +135,8 @@
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#define SWGPE_EN (1 << 2)
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#define SWGPE_EN (1 << 2)
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#define HOT_PLUG_EN (1 << 1)
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#define HOT_PLUG_EN (1 << 1)
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#define GBLRST_CAUSE0_THERMTRIP (1 << 5)
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#define MAINBOARD_POWER_OFF 0
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#define MAINBOARD_POWER_OFF 0
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#define MAINBOARD_POWER_ON 1
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#define MAINBOARD_POWER_ON 1
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#define MAINBOARD_POWER_KEEP 2
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#define MAINBOARD_POWER_KEEP 2
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