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soc/intel/common: Add reset_prepare() for common reset 

Some Intel SoC may need preparation before reset can be properly
handled. Add callback that chip/soc code can implement.

BUG=chrome-os-partner:55055

Change-Id: I45857838e1a306dbcb9ed262b55e7db88a8944e5
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15720
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Andrey Petrov 2016-07-15 13:31:09 -07:00 committed by Aaron Durbin
parent fcd51ffae8
commit 6401188024
2 changed files with 13 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/include/reset.h
View File

@ -10,5 +10,6 @@ void soft_reset(void);
void cpu_reset(void); void cpu_reset(void);
/* Some Intel SoCs use a special reset that is specific to SoC */ /* Some Intel SoCs use a special reset that is specific to SoC */
void global_reset(void); void global_reset(void);
/* Some Intel SoCs may need to prepare/wait before reset */
void reset_prepare(void);
#endif #endif

11
src/soc/intel/common/reset.c
View File

@ -25,8 +25,17 @@
#define RST_CPU (1 << 2) #define RST_CPU (1 << 2)
#define SYS_RST (1 << 1) #define SYS_RST (1 << 1)
#ifdef __ROMCC__
#define WEAK
#else
#define WEAK __attribute__((weak))
#endif
void WEAK reset_prepare(void) { /* do nothing */ }
void hard_reset(void) void hard_reset(void)
{ {
reset_prepare();
/* S0->S5->S0 trip. */ /* S0->S5->S0 trip. */
outb(RST_CPU | SYS_RST | FULL_RST, RST_CNT); outb(RST_CPU | SYS_RST | FULL_RST, RST_CNT);
while (1) while (1)
@ -35,6 +44,7 @@ void hard_reset(void)
void soft_reset(void) void soft_reset(void)
{ {
reset_prepare();
/* PMC_PLTRST# asserted. */ /* PMC_PLTRST# asserted. */
outb(RST_CPU | SYS_RST, RST_CNT); outb(RST_CPU | SYS_RST, RST_CNT);
while (1) while (1)
@ -43,6 +53,7 @@ void soft_reset(void)
void cpu_reset(void) void cpu_reset(void)
{ {
reset_prepare();
/* Sends INIT# to CPU */ /* Sends INIT# to CPU */
outb(RST_CPU, RST_CNT); outb(RST_CPU, RST_CNT);
while (1) while (1)