mediatek/mt8183: support more EMCP LPDDR4X DDR bootup

Support SANDISK SDADA4CR-128G, SAMSUNG KMDP6001DA-B425, KMDV6001DA-B620
EMCP LPDDR4X DDR bootup.

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on EMCP DRAM

Change-Id: I7de4c9a27282d3d00f51adf46dcb3d2f3984bfff
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Huayang Duan 2019-06-27 15:33:20 +08:00 committed by Martin Roth
parent 8f45905193
commit 640ca69c05
6 changed files with 138 additions and 9 deletions

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@ -21,8 +21,11 @@
static const char *const sdram_configs[] = {
[1] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB",
[2] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB",
[3] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
[3] = "sdram-lpddr4x-KMDH6001DA-B422-4GB",
[4] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
[5] = "sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB",
[6] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
[7] = "sdram-lpddr4x-SDADA4CR-128G-4GB",
};
static struct sdram_params params;

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@ -1,8 +1,11 @@
sdram-params :=
sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB
sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB
sdram-params += sdram-lpddr4x-KMDH6001DA-B422-4GB
sdram-params += sdram-lpddr4x-KMDP6001DA-B425-4GB
sdram-params += sdram-lpddr4x-MT29VZZZAD8DQKSL-4GB
sdram-params += sdram-lpddr4x-KMDV6001DA-B620-4GB
sdram-params += sdram-lpddr4x-SDADA4CR-128G-4GB
$(foreach params,$(sdram-params), \
$(eval cbfs-files-y += $(params)) \

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@ -0,0 +1,41 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 MediaTek Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <soc/emi.h>
struct sdram_params params = {
.impedance = {
[ODT_OFF] = {0x9, 0x7, 0x0, 0xF},
[ODT_ON] = {0xA, 0x9, 0x0, 0xE}
},
.wr_level = {
[CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} },
[CHANNEL_B] = { {0x1E, 0x1F}, {0x1D, 0x1E} }
},
.cbt_cs = {
[CHANNEL_A] = {0x1, 0x1},
[CHANNEL_B] = {0x2, 0x2}
},
.cbt_mr12 = {
[CHANNEL_A] = {0x56, 0x56},
[CHANNEL_B] = {0x58, 0x5C}
},
.emi_cona_val = 0xF053F154,
.emi_conh_val = 0x44440003,
.emi_conf_val = 0x00421000,
.chn_emi_cona_val = {0x0444F051, 0x0444F051},
.cbt_mode_extern = CBT_NORMAL_MODE,
.delay_cell_unit = 868,
};

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@ -17,20 +17,20 @@
struct sdram_params params = {
.impedance = {
[ODT_OFF] = {0x9, 0x7, 0x0, 0xF},
[ODT_ON] = {0xA, 0x9, 0x0, 0xE}
[ODT_OFF] = {0x7, 0x6, 0x0, 0xF},
[ODT_ON] = {0x8, 0x9, 0x0, 0xD}
},
.wr_level = {
[CHANNEL_A] = { {0x21, 0x21}, {0x20, 0x20} },
[CHANNEL_B] = { {0x1E, 0x1F}, {0x1D, 0x1E} }
[CHANNEL_A] = { {0x22, 0x21}, {0x20, 0x21} },
[CHANNEL_B] = { {0x23, 0x27}, {0x23, 0x27} }
},
.cbt_cs = {
[CHANNEL_A] = {0x1, 0x1},
[CHANNEL_B] = {0x2, 0x2}
[CHANNEL_A] = {0x0, 0x0},
[CHANNEL_B] = {0x6, 0x6}
},
.cbt_mr12 = {
[CHANNEL_A] = {0x56, 0x56},
[CHANNEL_B] = {0x58, 0x5C}
[CHANNEL_A] = {0x56, 0x5A},
[CHANNEL_B] = {0x58, 0x58}
},
.emi_cona_val = 0xF053F154,
.emi_conh_val = 0x44440003,

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@ -0,0 +1,41 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 MediaTek Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <soc/emi.h>
struct sdram_params params = {
.impedance = {
[ODT_OFF] = {0x8, 0x7, 0x0, 0xF},
[ODT_ON] = {0x9, 0x9, 0x0, 0xD}
},
.wr_level = {
[CHANNEL_A] = { {0x21, 0x24}, {0x22, 0x24} },
[CHANNEL_B] = { {0x24, 0x28}, {0x22, 0x27} }
},
.cbt_cs = {
[CHANNEL_A] = {0xC, 0xC},
[CHANNEL_B] = {0xB, 0xB}
},
.cbt_mr12 = {
[CHANNEL_A] = {0x58, 0x58},
[CHANNEL_B] = {0x56, 0x56}
},
.emi_cona_val = 0xF053F154,
.emi_conh_val = 0x44440003,
.emi_conf_val = 0x00421000,
.chn_emi_cona_val = {0x0444F051, 0x0444F051},
.cbt_mode_extern = CBT_NORMAL_MODE,
.delay_cell_unit = 868,
};

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@ -0,0 +1,41 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 MediaTek Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <soc/emi.h>
struct sdram_params params = {
.impedance = {
[ODT_OFF] = {0x8, 0x7, 0x0, 0xF},
[ODT_ON] = {0x9, 0x9, 0x0, 0xE}
},
.wr_level = {
[CHANNEL_A] = { {0x1F, 0x1C}, {0x1C, 0x1B} },
[CHANNEL_B] = { {0x27, 0x28}, {0x23, 0x28} }
},
.cbt_cs = {
[CHANNEL_A] = {0x3, 0x3},
[CHANNEL_B] = {0x4, 0x6}
},
.cbt_mr12 = {
[CHANNEL_A] = {0x5C, 0x5A},
[CHANNEL_B] = {0x5C, 0x5A}
},
.emi_cona_val = 0xF053F154,
.emi_conh_val = 0x44440003,
.emi_conf_val = 0x00421000,
.chn_emi_cona_val = {0x0444F051, 0x0444F051},
.cbt_mode_extern = CBT_NORMAL_MODE,
.delay_cell_unit = 868,
};