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soc/amd/stoneyridge/acpi/sb_fch: use I2C[ABCD]_BASE_ADDRESS defines 

Now that the I2C[ABCD]_BASE_ADDRESS defines aren't macros that calculate
the MMIO addresses any more, those defines can also be used in the ACPI
code.

TEST=Timeless build results in identical image for Google/Treeya.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I7de2f83dc2f8061d8f1735caf10314bcddb2d3fa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2021-10-14 21:15:51 +02:00 committed by Felix Held
parent 9836b37793
commit 640ec2581b
1 changed files with 4 additions and 4 deletions
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8
src/soc/amd/stoneyridge/acpi/sb_fch.asl
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@ -74,7 +74,7 @@ Device (I2CA) {
Name (_CRS, ResourceTemplate()
{
IRQ (Edge, ActiveHigh, Exclusive) { 3 }
Memory32Fixed (ReadWrite, 0xFEDC2000, 0x1000)
Memory32Fixed (ReadWrite, I2CA_BASE_ADDRESS, 0x1000)
})
Method (_STA, 0x0, NotSerialized)
@ -90,7 +90,7 @@ Device (I2CB)
Name (_CRS, ResourceTemplate()
{
IRQ (Edge, ActiveHigh, Exclusive) { 15 }
Memory32Fixed (ReadWrite, 0xFEDC3000, 0x1000)
Memory32Fixed (ReadWrite, I2CB_BASE_ADDRESS, 0x1000)
})
Method (_STA, 0x0, NotSerialized)
{
@ -104,7 +104,7 @@ Device (I2CC) {
Name (_CRS, ResourceTemplate()
{
IRQ (Edge, ActiveHigh, Exclusive) { 6 }
Memory32Fixed (ReadWrite, 0xFEDC4000, 0x1000)
Memory32Fixed (ReadWrite, I2CC_BASE_ADDRESS, 0x1000)
})
Method (_STA, 0x0, NotSerialized)
@ -119,7 +119,7 @@ Device (I2CD)
Name (_UID, 0x3)
Name (_CRS, ResourceTemplate() {
IRQ (Edge, ActiveHigh, Exclusive) { 14 }
Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000)
Memory32Fixed(ReadWrite, I2CD_BASE_ADDRESS, 0x1000)
})
Method (_STA, 0x0, NotSerialized)
{