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drivers/uart/oxpcie_early.c: remove uart_fill_lb() 

uart_fill_lb() was added to drivers/uart/uart8250mem.c, so when the
Oxford OXPCIe952 Kconfig option is enabled, we were getting an error.
"multiple definition of `uart_fill_lb'"

The new version of uart_fill_lb sets the regwidth depending on the
Kconfig symbol DRIVERS_UART_8250MEM_32, so if that's selected, don't
give DRIVERS_UART_OXPCIE as a choice.

Change-Id: Ife24ab390553b10b2266809595c2e06463de708c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/17966
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Martin Roth 2016-12-18 11:02:56 -07:00
parent 8c50e68441
commit 643236e193
2 changed files with 1 additions and 15 deletions
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2
src/drivers/uart/Kconfig
View File

@ -47,7 +47,7 @@ config HAVE_UART_SPECIAL
config DRIVERS_UART_OXPCIE config DRIVERS_UART_OXPCIE
bool "Oxford OXPCIe952" bool "Oxford OXPCIe952"
default n default n
depends on PCI depends on PCI && !DRIVERS_UART_8250MEM_32
select DRIVERS_UART_8250MEM select DRIVERS_UART_8250MEM
select EARLY_PCI_BRIDGE select EARLY_PCI_BRIDGE
select UART_OVERRIDE_REFCLK select UART_OVERRIDE_REFCLK

14
src/drivers/uart/oxpcie_early.c
View File

@ -84,20 +84,6 @@ void oxford_remap(u32 new_base)
{ {
uart0_base = new_base + 0x1000; uart0_base = new_base + 0x1000;
} }
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = default_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
#endif #endif
unsigned int uart_platform_refclk(void) unsigned int uart_platform_refclk(void)