google/cyan: do not hardcode virtual interrupt numbers

Adapted from chromium commit ee7a150
[Strago: do not hardcode virtual interrupt numbers]

Instead of hardcoding virtual interrupt numbers that may change as
the kernel changes, use GpioInt() resources to describe keyboard,
touchpad, and touchscreen interrupt lines.

TEST=Build and boot several cyan variant boards, verify keyboard,
touchpad and touchscreen work with newer kernels (4.14+).

Original-Change-Id: I98d5726f5b8094d639fb40dfca128364f63bb30b
Original-Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/894687
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Iecfb45be433249d274532eb746588483fedb3f52
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Matt DeVillier 2018-07-31 16:32:25 -05:00 committed by Patrick Georgi
parent ed219ae306
commit 6444d7df0b
11 changed files with 20 additions and 30 deletions

View File

@ -35,10 +35,8 @@ Scope (\_SB.PCI0.I2C1)
AddressingMode7Bit, /* AddressingMode */
"\\_SB.PCI0.I2C1", /* ResourceSource */
)
Interrupt (ResourceConsumer, Level, ActiveLow)
{
BOARD_TOUCH_IRQ
}
GpioInt (Level, ActiveLow, ExclusiveAndWake, PullNone,,
"\\_SB.GPNC") { BOARD_TOUCH_GPIO_INDEX }
} )
Return (BUF0)

View File

@ -35,10 +35,8 @@ Scope (\_SB.PCI0.I2C1)
AddressingMode7Bit, /* AddressingMode */
"\\_SB.I2C1", /* ResourceSource */
)
Interrupt (ResourceConsumer, Level, ActiveLow)
{
BOARD_TOUCH_IRQ
}
GpioInt (Level, ActiveLow, ExclusiveAndWake, PullNone,,
"\\_SB.GPNC") { BOARD_TOUCH_GPIO_INDEX }
})
Return (BUF0)
}

View File

@ -78,10 +78,8 @@ Scope (\_SB.PCI0.I2C1)
AddressingMode7Bit, /* AddressingMode */
"\\_SB.PCI0.I2C1", /* ResourceSource */
)
Interrupt (ResourceConsumer, Edge, ActiveLow)
{
BOARD_TOUCH_IRQ
}
GpioInt (Level, ActiveLow, ExclusiveAndWake, PullNone,,
"\\_SB.GPNC") { BOARD_TOUCH_GPIO_INDEX }
})
Return (BUF0)
}

View File

@ -33,10 +33,8 @@ Scope (\_SB.PCI0.I2C6)
AddressingMode7Bit, // AddressingMode
"\\_SB.PCI0.I2C6", // ResourceSource
)
Interrupt (ResourceConsumer, Edge, ActiveLow)
{
183
}
GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,
"\\_SB.GPNC") { BOARD_TRACKPAD_GPIO_INDEX }
})
Method (_STA)

View File

@ -30,8 +30,6 @@
* GPSE_SIZE = 86
*/
#define BOARD_TOUCH_IRQ 184
/* KBD: Gpio index in N bank */
#define BOARD_I8042_GPIO_INDEX 17
/* SCI: Gpio index in N bank */

View File

@ -30,8 +30,6 @@
* GPSE_SIZE = 86
*/
#define BOARD_TOUCH_IRQ 184
/* KBD: Gpio index in N bank */
#define BOARD_I8042_GPIO_INDEX 17
/* Audio: Gpio index in SW bank */
@ -40,6 +38,8 @@
#define BOARD_SCI_GPIO_INDEX 15
/* Trackpad: Gpio index in N bank */
#define BOARD_TRACKPAD_GPIO_INDEX 18
/* Touch: Gpio index in N bank */
#define BOARD_TOUCH_GPIO_INDEX 19
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)

View File

@ -30,8 +30,6 @@
* GPSE_SIZE = 86
*/
#define BOARD_TOUCH_IRQ 184
/* DPTF */
#define DPTF_CPU_PASSIVE 80
#define DPTF_CPU_CRITICAL 90
@ -44,6 +42,8 @@
#define BOARD_SCI_GPIO_INDEX 15
/* Trackpad: Gpio index in N bank */
#define BOARD_TRACKPAD_GPIO_INDEX 18
/* Touch: Gpio index in N bank */
#define BOARD_TOUCH_GPIO_INDEX 19
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)

View File

@ -30,8 +30,6 @@
* GPSE_SIZE = 86
*/
#define BOARD_TOUCH_IRQ 184
/* KBD: Gpio index in N bank */
#define BOARD_I8042_GPIO_INDEX 17
/* Audio: Gpio index in SW bank */
@ -40,6 +38,8 @@
#define BOARD_SCI_GPIO_INDEX 15
/* Trackpad: Gpio index in N bank */
#define BOARD_TRACKPAD_GPIO_INDEX 18
/* Touch: Gpio index in N bank */
#define BOARD_TOUCH_GPIO_INDEX 19
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)

View File

@ -30,8 +30,6 @@
* GPSE_SIZE = 86
*/
#define BOARD_TOUCH_IRQ 184
/* KBD: Gpio index in N bank */
#define BOARD_I8042_GPIO_INDEX 17
/* Audio: Gpio index in SW bank */
@ -40,6 +38,8 @@
#define BOARD_SCI_GPIO_INDEX 15
/* Trackpad: Gpio index in N bank */
#define BOARD_TRACKPAD_GPIO_INDEX 18
/* Touch: Gpio index in N bank */
#define BOARD_TOUCH_GPIO_INDEX 19
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)

View File

@ -30,8 +30,6 @@
* GPSE_SIZE = 86
*/
#define BOARD_TOUCH_IRQ 184
/* DPTF */
#define DPTF_CPU_PASSIVE 80
#define DPTF_CPU_CRITICAL 90
@ -44,6 +42,8 @@
#define BOARD_SCI_GPIO_INDEX 15
/* Trackpad: Gpio index in N bank */
#define BOARD_TRACKPAD_GPIO_INDEX 18
/* Touch: Gpio index in N bank */
#define BOARD_TOUCH_GPIO_INDEX 19
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)

View File

@ -30,8 +30,6 @@
* GPSE_SIZE = 86
*/
#define BOARD_TOUCH_IRQ 184
/* KBD: Gpio index in N bank */
#define BOARD_I8042_GPIO_INDEX 17
/* Audio: Gpio index in SW bank */
@ -40,6 +38,8 @@
#define BOARD_SCI_GPIO_INDEX 15
/* Trackpad: Gpio index in N bank */
#define BOARD_TRACKPAD_GPIO_INDEX 18
/* Touch: Gpio index in N bank */
#define BOARD_TOUCH_GPIO_INDEX 19
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)