mb/google/geralt: Add USB3 HUB reset funtion to bootblock

After powering on the device, we need to pull USB3_HUB_RST_L up to
enable USB3 Hub.

TEST=boot kernel from USB ok
BUG=b:264841530

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Change-Id: I8df35efb78e90a5b3314840fe2eae81d6e501242
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72594
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Bo-Chen Chen 2023-01-30 18:58:01 +08:00 committed by Paul Fagerburg
parent 0bff4b05b8
commit 6453cffd21
2 changed files with 9 additions and 0 deletions

View File

@ -2,12 +2,18 @@
#include <bootblock_common.h>
#include <device/mmio.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <soc/i2c.h>
#include <soc/spi.h>
#include "gpio.h"
static void usb3_hub_reset(void)
{
gpio_output(GPIO_USB3_HUB_RST_L, 1);
}
void bootblock_mainboard_init(void)
{
mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST);
@ -15,4 +21,5 @@ void bootblock_mainboard_init(void)
mtk_snfc_init();
setup_chromeos_gpios();
gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING);
usb3_hub_reset();
}

View File

@ -22,6 +22,8 @@
#define GPIO_SD_CD_ODL GPIO(I2SIN_MCK)
#define GPIO_USB3_HUB_RST_L GPIO(MSDC2_DAT0)
void setup_chromeos_gpios(void);
#endif