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mb/google/rex/var/screebo: enable fingerprint 

BUG=b:278156430
TEST=verify the fingerprint on screebo

Change-Id: I986e470b28145f7b17427e794055929a4283c721
Signed-off-by: Simon Zhou <zhouguohui@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75287
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dolan Liu <liuyong5@huaqin.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Simon Zhou 2023-05-17 10:12:29 +08:00 committed by Jakub Czapiga
parent 4e4141ac6c
commit 6477d19e64
2 changed files with 16 additions and 1 deletions
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2
src/mainboard/google/rex/variants/screebo/gpio.c
View File

@ -398,7 +398,7 @@ static const struct pad_config romstage_gpio_table[] = {
PAD_CFG_GPO(GPP_B08, 0, DEEP),
/* A20 : [] ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_A20, 0, DEEP),
/* GPP_C23 : [] ==> FP_RST_ODL */
/* GPP_C21 : [] ==> FP_RST_ODL */
PAD_CFG_GPO(GPP_C21, 0, DEEP),
/* GPP_D02 : [] ==> SD_PERST_L */
PAD_CFG_GPO(GPP_D02, 1, DEEP),

15
src/mainboard/google/rex/variants/screebo/overridetree.cb
View File

@ -319,6 +319,21 @@ chip soc/intel/meteorlake
device i2c 50 on end
end
end
device ref gspi1 on
chip drivers/spi/acpi
register "name" = ""CRFP""
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E10_IRQ)"
register "wake" = "GPE0_DW1_10"
register "has_power_resource" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C21)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B08)"
register "enable_delay_ms" = "3"
device spi 0 on end
end # FPMCU
end
device ref soc_espi on
chip ec/google/chromeec
use conn0 as mux_conn[0]