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peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards 

Historically we had set panel timing in the mainboard gma code. This goes
back to the replay-attack video startup.

We can let the haswell gma code set these values from the device tree
settings.

Change-Id: If32150d2857241ca2d2c88880086f49d25815d76
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: https://chromium-review.googlesource.com/180521
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Ronald Minnich <rminnich@chromium.org>
Tested-by: Ronald Minnich <rminnich@chromium.org>
(cherry picked from commit 406eab3ca6a9bc59382866817786bf96bbb19d56)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6911
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Ronald G. Minnich 2013-12-17 15:21:54 -08:00 committed by Isaac Christensen
parent e9e31892d2
commit 6481cfb15d
3 changed files with 0 additions and 9 deletions
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3
src/mainboard/google/falco/gma.c
View File

@ -188,9 +188,6 @@ int panel_lightup(struct intel_dp *dp, unsigned int init_fb)
/* These values are used for training the link */ /* These values are used for training the link */
dp->lane_count = 2; dp->lane_count = 2;
dp->link_bw = DP_LINK_BW_2_7; dp->link_bw = DP_LINK_BW_2_7;
dp->panel_power_down_delay = 600;
dp->panel_power_up_delay = 200;
dp->panel_power_cycle_delay = 600;
dp->pipe = PIPE_A; dp->pipe = PIPE_A;
dp->port = PORT_A; dp->port = PORT_A;
dp->plane = PLANE_A; dp->plane = PLANE_A;

5
src/mainboard/google/peppy/gma.c
View File

@ -214,11 +214,6 @@ int panel_lightup(struct intel_dp *dp, unsigned int init_fb)
dp->aux_clock_divider = 0xe1; dp->aux_clock_divider = 0xe1;
dp->precharge = 3; dp->precharge = 3;
/* CRAP -- needs to be done elsewhere from the device tree. */
dp->panel_power_down_delay = 600;
dp->panel_power_up_delay = 200;
dp->panel_power_cycle_delay = 600;
/* 1. Normal mode: Set the first page to zero and make /* 1. Normal mode: Set the first page to zero and make
all GTT entries point to the same page all GTT entries point to the same page
2. Developer/Recovery mode: Set up a tasteful color 2. Developer/Recovery mode: Set up a tasteful color

1
src/northbridge/intel/haswell/gma.c
View File

@ -460,7 +460,6 @@ static void gma_func0_init(struct device *dev)
dp.panel_power_up_delay = conf->gpu_panel_power_up_delay; dp.panel_power_up_delay = conf->gpu_panel_power_up_delay;
dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay; dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay;
dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf;
#ifdef CONFIG_CHROMEOS #ifdef CONFIG_CHROMEOS
init_fb = developer_mode_enabled() || recovery_mode_enabled(); init_fb = developer_mode_enabled() || recovery_mode_enabled();
#endif #endif