copy_and_run: drop boot_complete parameter

Since this parameter is not used anymore, drop it from
all calls to copy_and_run()

Change-Id: Ifba25aff4b448c1511e26313fe35007335aa7f7a
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3213
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/arch/x86/include/arch/stages.h

@@ -22,6 +22,5 @@
 
 #include <arch/cpu.h>
 
-void asmlinkage copy_and_run(unsigned cpu_reset);
-void asmlinkage copy_and_run_ap_code_in_car(unsigned ret_addr);
+void asmlinkage copy_and_run(void);
 #endif

src/arch/x86/init/crt0_romcc_epilogue.inc

@@ -7,17 +7,12 @@
  */
 #include <cpu/x86/post_code.h>
 
-	/* clear boot_complete flag */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* clear direction flag */
 
-	movl	%ebp, %esi
-
 	movl $ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl %esi
 	call copy_and_run
 
 .Lhlt:

src/arch/x86/lib/c_start.S

@@ -77,7 +77,6 @@ _start:
 #if CONFIG_GDB_WAIT
 	call gdb_stub_breakpoint
 #endif
-	/* The boot_complete flag has already been pushed */
 	call	hardwaremain
 	/* NOTREACHED */
 .Lhlt:

src/arch/x86/lib/cbfs_and_run.c

@@ -22,7 +22,7 @@
 #include <arch/stages.h>
 #include <timestamp.h>
 
-static void cbfs_and_run_core(const char *filename, unsigned ebp)
+static void cbfs_and_run_core(const char *filename)
 {
 	u8 *dst;
 
@@ -35,19 +35,14 @@ static void cbfs_and_run_core(const char *filename, unsigned ebp)
 	timestamp_add_now(TS_END_COPYRAM);
 	print_debug("Jumping to image.\n");
 	__asm__ volatile (
-		"movl %%eax, %%ebp\n"
 		"jmp  *%%edi\n"
-		:: "a"(ebp), "D"(dst)
+		:: "D"(dst)
 	);
 }
 
-void asmlinkage copy_and_run(unsigned cpu_reset)
+void asmlinkage copy_and_run(void)
 {
-	// FIXME fix input parameters instead normalizing them here.
-	if (cpu_reset == 1) cpu_reset = -1;
-	else cpu_reset = 0;
-
-	cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram", cpu_reset);
+	cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram");
 }
 
 #if CONFIG_AP_CODE_IN_CAR

src/arch/x86/lib/stages.c

@@ -20,8 +20,6 @@
 static void skip_romstage(void)
 {
 	asm volatile (
-		"/* set the boot_complete flag */\n"
-		"movl	$0xffffffff, %%ebp\n"
 		"jmp	__main\n"
 	);
 }

src/cpu/amd/car/post_cache_as_ram.c

@@ -165,7 +165,7 @@ static void post_cache_as_ram(void)
 	set_sysinfo_in_ram(1); // So other core0 could start to train mem
 
 	/*copy and execute coreboot_ram */
-	copy_and_run(0);
+	copy_and_run();
 	/* We will not return */
 
 	print_debug("should not be here -\n");

src/cpu/amd/geode_gx2/cache_as_ram.inc

@@ -182,8 +182,6 @@ done_cache_as_ram_main:
 	xorl             $(CR0_CD + CR0_NW), %eax        /* clear  the CD and NW bits */
 	movl    %eax, %cr0
 
-	/* clear boot_complete flag */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 
@@ -197,8 +195,6 @@ __main:
 	 * the location it is compiled to run at.
 	 * Normally this is copying from FLASH ROM to RAM.
 	 */
-	movl	%ebp, %esi
-	pushl	%esi
 	call copy_and_run
 
 .Lhlt:

src/cpu/amd/geode_lx/cache_as_ram.inc

@@ -208,8 +208,6 @@ done_cache_as_ram_main:
         xorl             $(CR0_CD + CR0_NW), %eax        /* clear  the CD and NW bits */
         movl    %eax, %cr0
 
-	/* clear boot_complete flag */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 
@@ -223,8 +221,6 @@ __main:
 	 * the location it is compiled to run at.
 	 * Normally this is copying from FLASH ROM to RAM.
 	 */
-	movl	%ebp, %esi
-	pushl	%esi
 	call copy_and_run
 
 .Lhlt:

src/cpu/intel/car/cache_as_ram.inc

@@ -357,17 +357,12 @@ lout:
 	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	movl	%eax, %cr0
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/cpu/intel/car/cache_as_ram_ht.inc

@@ -431,17 +431,12 @@ no_msr_11e:
 
 	post_code(0x3c)
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/cpu/intel/haswell/romstage.c

@@ -326,7 +326,7 @@ void romstage_after_car(void)
 #endif
 
 	/* Load the ramstage. */
-	copy_and_run(0);
+	copy_and_run();
 }
 
 

src/cpu/intel/model_206ax/cache_as_ram.inc

@@ -316,17 +316,12 @@ __acpi_resume_backup_done:
 
 	post_code(0x3d)
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/cpu/intel/model_6ex/cache_as_ram.inc

@@ -225,17 +225,12 @@ clear_mtrrs:
 
 	post_code(0x3c)
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/cpu/via/car/cache_as_ram.inc

@@ -264,17 +264,12 @@ testok:
 	movl	%eax, %cr0
 	invd
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/mainboard/amd/dinar/romstage.c

@@ -154,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	print_debug("done\n");
 
 	post_code(0x44);
-	copy_and_run(0);
+	copy_and_run();
 
 	post_code(0x45);  // Should never see this post code.
 }

src/mainboard/amd/inagua/romstage.c

@@ -119,7 +119,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
 
 	post_code(0x54);	/* Should never see this post code. */

src/mainboard/amd/parmer/romstage.c

@@ -151,7 +151,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254 ();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 
 	post_code(0x54);  /* Should never see this post code. */
 }

src/mainboard/amd/persimmon/romstage.c

@@ -178,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254 ();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
 
 	post_code(0x54);	/* Should never see this post code. */

src/mainboard/amd/south_station/romstage.c

@@ -111,7 +111,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		printk(BIOS_DEBUG, "passed.\n");
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
 
 	post_code(0x54);  /* Should never see this post code. */

src/mainboard/amd/thatcher/romstage.c

@@ -168,7 +168,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254 ();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 
 	post_code(0x54);  /* Should never see this post code. */
 }

src/mainboard/amd/torpedo/romstage.c

@@ -125,7 +125,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 
 	post_code(0x43);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run returned!\n");
 
 	post_code(0x44);	// Should never see this post code.

src/mainboard/amd/union_station/romstage.c

@@ -106,7 +106,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		printk(BIOS_DEBUG, "passed.\n");
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
 
 	post_code(0x54);  /* Should never see this post code. */

src/mainboard/asrock/e350m1/romstage.c

@@ -122,7 +122,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
 
 	post_code(0x54);	/* Should never see this post code. */

src/mainboard/asus/f2a85-m/romstage.c

@@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254 ();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 
 	post_code(0x54);  /* Should never see this post code. */
 }

src/mainboard/emulation/qemu-x86/cache_as_ram.inc

@@ -80,17 +80,12 @@ __acpi_resume_backup_done:
 
 	post_code(0x3d)
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/mainboard/lippert/frontrunner-af/romstage.c

@@ -182,7 +182,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254 ();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
 
 	post_code(0x54);	/* Should never see this post code. */

src/mainboard/lippert/toucan-af/romstage.c

@@ -182,7 +182,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	setup_i8254 ();
 
 	post_code(0x50);
-	copy_and_run(0);
+	copy_and_run();
 	printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
 
 	post_code(0x54);	/* Should never see this post code. */

src/mainboard/supermicro/h8qgi/romstage.c

@@ -128,7 +128,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	print_debug("done\n");
 
 	post_code(0x51);
-	copy_and_run(0);
+	copy_and_run();
 
 	/* We will not return,  Should never see this message and post code. */
 	print_debug("should not be here -\n");

src/mainboard/supermicro/h8scm/romstage.c

@@ -136,7 +136,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	print_debug("done\n");
 
 	post_code(0x51);
-	copy_and_run(0);
+	copy_and_run();
 
 	/* We will not return,  Should never see this message and post code. */
 	print_debug("should not be here -\n");

src/mainboard/tyan/s8226/romstage.c

@@ -136,7 +136,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	post_code(0x51);
 	setup_i8259 ();
 	setup_i8254 ();
-	copy_and_run(0);
+	copy_and_run();
 
 	/* We will not return,  Should never see this message and post code. */
 	print_debug("should not be here -\n");