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mb/asrock/b85m_pro4: Add Super I/O GPIO table 

Information taken from the boardviews. We are not configuring any GPIO
in bootblock, but we may want to do so in the future.

Change-Id: Iac16f02490adcccd9486718847ca2b1a47f4e6cf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42404
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-06-15 23:56:28 +02:00
parent 822b267a8c
commit 649505b077
1 changed files with 35 additions and 0 deletions
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35
src/mainboard/asrock/b85m_pro4/bootblock.c
View File

@ -9,6 +9,41 @@
#define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1)
#define ACPI_DEV PNP_DEV(0x2e, NCT6776_ACPI)
/*
* Asrock B85M Pro4 Super I/O GPIOs
*
* +------+-----+---------------------------+
* | GPIO | Pin | Description |
* +------+-----+---------------------------+
* | GP00 | 2 | N/C |
* | GP01 | 4 | CPU Fan 4-pin tach enable |
* | GP02 | 5 | CPU Fan 3-pin tach enable |
* | GP03 | 8 | CPU Fan 3-pin FON# signal |
* | GP04 | 9 | N/C |
* | GP05 | 11 | N/C (+1.05V_PCH_GPIO) |
* | GP06 | 12 | N/C (+1.5V_PCH_GPIO) |
* | GP07 | 13 | N/C |
* +------+-----+---------------------------+
* | GP10 | 123 | N/C (VCCM_OV1) |
* | GP11 | 122 | N/C (VCCM_OV2) |
* | GP12 | 121 | N/C (VCCM_OV3) |
* | GP13 | 120 | N/C (VCCM_STEP) |
* | GP14 | 119 | Assert HDA_SDO (SIO_GP14) |
* | GP15 | 118 | N/C (PWM_THROTTLE) |
* | GP16 | 117 | OTP for VCORE (OTE_GATE1) |
* | GP17 | 116 | N/C (IMON_GPIO) |
* +------+-----+---------------------------+
* | GP70 | 93 | PWR_FANIN |
* | GP71 | 92 | N/C |
* | GP72 | 91 | N/C (SIO_PIN91) |
* | GP73 | 90 | CHA2_FANIN |
* | GP74 | 89 | N/C (SIO_PIN89) |
* | GP75 | 88 | N/C (SIO_PIN88) |
* | GP76 | 87 | HDA reset gate (GP76) |
* | GP77 | 86 | HDD_LED gate |
* +------+-----+---------------------------+
*/
void mainboard_config_superio(void)
{
nuvoton_pnp_enter_conf_state(GLOBAL_DEV);